W83194BR-97 Datasheet, PDF (4/11 Pages) Winbond – 200MHZ CLOCK FOR CAMINO CHIPSET

W83194BR-97
PRELIMINARY
The Pin column lists the affected pin number and the @PowerUp column gives the state at true
power up. Registers are set to the values shown only on true power up. "Command Code" byte and
"Byte Count" byte must be sent following the acknowledge of the Address Byte. Although the data
(bits) in these two bytes are considered "don't care", they must be sent and will be acknowledge.
After that, the below described sequence (Register 0, Register 1, Register 2, ....) will be valid and
acknowledged.
Frequency Selection BY I2C
SSEL5 SSEL4 SSEL3 SSEL2 SSEL1 SSEL0 _{CPU CPU/2 3V66/ 3V66 PCI} IOAPIC (MHz) IOAPIC (MHz)
(MHz)
CPU (MHz) (MHz) ^{FREQ_APIC=1 FREQ_APIC=0}
0 0 0 0 0 0 103.00 51.50 0.67
0 0 0 0 0 1 105.00 52.50 0.67
0 0 0 0 1 0 100.30 50.15 0.67
0 0 0 0 1 1 100.90 50.45 0.67
0 0 0 1 0 0 107.00 53.50 0.67
0 0 0 1 0 1 109.00 54.50 0.67
0 0 0 1 1 0 112.00 56.00 0.67
0 0 0 1 1 1 114.00 57.00 0.67
0 0 1 0 0 0 116.10 58.05 0.67
0 0 1 0 0 1 118.00 59.00 0.67
0 0 1 0 1 0 133.30 66.65 0.50
0 0 1 0 1 1 120.00 60.00 0.67
0 0 1 1 0 0 122.00 61.00 0.67
0 0 1 1 0 1 125.10 62.55 0.67
0 0 1 1 1 0 128.20 64.10 0.67
0 0 1 1 1 1 130.00 65.00 0.67
0 1 0 0 0 0 133.00 66.50 0.67
0 1 0 0 0 1 133.90 66.95 0.50
0 1 0 0 1 0 138.00 69.00 0.50
0 1 0 0 1 1 142.00 71.00 0.50
0 1 0 1 0 0 146.00 73.00 0.50
0 1 0 1 0 1 150.00 75.00 0.50
0 1 0 1 1 0 153.00 76.50 0.50
0 1 0 1 1 1 156.00 78.00 0.50
0 1 1 0 0 0 159.10 79.55 0.50
0 1 1 0 0 1 162.00 81.00 0.50
0 1 1 0 1 0 165.00 82.50 0.50
0 1 1 0 1 1 168.00 84.00 0.50
0 1 1 1 0 0 171.00 85.50 0.50
0 1 1 1 0 1 174.00 87.00 0.50
0 1 1 1 1 0 177.00 88.50 0.50
0 1 1 1 1 1 180.00 90.00 0.50
SSEL5 SSEL4 SSEL3 SSEL2 SSEL1 SSEL0 _{CPU CPU/2 3V66/}
(MHz)
CPU
68.67
70.00
66.87
67.27
71.33
72.67
74.67
76.00
77.40
78.67
66.65
80.00
81.33
83.40
85.47
86.67
88.67
66.95
69.00
71.00
73.00
75.00
76.50
78.00
79.55
81.00
82.50
84.00
85.50
87.00
88.50
90.00
3V66
(MHz)
34.33
35.00
33.43
33.63
35.67
36.33
37.33
38.00
38.70
39.33
33.33
40.00
40.67
41.70
42.73
43.33
44.33
33.48
34.50
35.50
36.50
37.50
38.25
39.00
39.78
40.50
41.25
42.00
42.75
43.50
44.25
45.00
17.17
17.50
16.72
16.82
17.83
18.17
18.67
19.00
19.35
19.67
16.66
20.00
20.33
20.85
21.37
21.67
22.17
16.74
17.25
17.75
18.25
18.75
19.13
19.50
19.89
20.25
20.63
21.00
21.38
21.75
22.13
22.50
PCI ^{IOAPIC (MHz)}
(MHz) ^FREQ_APIC=1
34.33
35.00
33.43
33.63
35.67
36.33
37.33
38.00
38.70
39.33
33.33
40.00
40.67
41.70
42.73
43.33
44.33
33.48
34.50
35.50
36.50
37.50
38.25
39.00
39.78
40.50
41.25
42.00
42.75
43.50
44.25
45.00
IOAPIC (MHz)
FREQ_APIC=0
Publication Release Date: Dec. 1999
-4-
Revision 0.35