W77E058A Datasheet, PDF (64/87 Pages) Winbond – 8-BIT MICROCONTROLLER

W77E058A
Clock Source
Mode input
div. by 4 osc/1
div. by 64 osc/16
div. by 1024 osc/256
Write to
SBUF
Internal
Data Bus
12
4
TX START TX SHIFT
TX CLOCK
TI
PARIN SOUT
LOAD
CLOCK
RXD
P3.0 Alternate
Output Function
Transmit Shift Register
SM2
01
RI
REN
RXD
P3.0 Alternate
Iutput function
SERIAL
RI
CONTROLLE
RX
CLOCK
RX
START
SHIFT
CLOCK
LOAD SBUF
RX SHIFT
CLOCK
PAROUT
SIN
Serial Port Interrupt
TXD
P3.1 Alternate
Output function
SBUF
Read SBUF
SBUF
Internal
Data Bus
Receive Shift Register
Figure 20. Serial Port Mode 0
The TI flag is set high in C1 following the end of transmission of the last bit. The serial port will receive
data when REN is 1 and RI is zero. The shift clock (TxD) will be activated and the serial port will latch
data on the rising edge of shift clock. The external device should therefore present data on the falling
edge on the shift clock. This process continues till all the 8 bits have been received. The RI flag is set
in C1 following the last rising edge of the shift clock on TxD. This will stop reception, till the RI is
cleared by software.
14.2 Mode 1
In Mode 1, the full duplex asynchronous mode is used. Serial communication frames are made up of
10 bits transmitted on TXD and received on RXD. The 10 bits consist of a start bit (0), 8 data bits (LSB
first), and a stop bit (1). On receive, the stop bit goes into RB8 in the SFR SCON. The baud rate in this
mode is variable. The serial baud can be programmed to be 1/16 or 1/32 of the Timer 1 overflow.
Since the Timer 1 can be set to different reload values, a wide variation in baud rates is possible.
Transmission begins with a write to SBUF. The serial data is brought out on to TxD pin at C1 following
the first roll-over of divide by 16 counter. The next bit is placed on TxD pin at C1 following the next
rollover of the divide by 16 counter. Thus the transmission is synchronized to the divide by 16 counter
and not directly to the write to SBUF signal. After all 8 bits of data are transmitted, the stop bit is
transmitted. The TI flag is set in the C1 state after the stop bit has been put out on TxD pin. This will
be at the 10th rollover of the divide by 16 counter after a write to SBUF.
Reception is enabled only if REN is high. The serial port actually starts the receiving of serial data,
with the detection of a falling edge on the RxD pin. The 1-to-0 detector continuously monitors the RxD
line, sampling it at the rate of 16 times the selected baud rate. When a falling edge is detected, the
divide by 16 counter is immediately reset. This helps to align the bit boundaries with the rollovers of
the divide by 16 counter.
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