W9425G6KH-5-TR Datasheet, PDF (4/52 Pages) Winbond – 4 M 4 BANKS 16 BITS DDR SDRAM

W9425G6KH
1. GENERAL DESCRIPTION
W9425G6KH is a CMOS Double Data Rate synchronous dynamic random access memory (DDR
SDRAM), organized as 4,194,304 words  4 banks  16 bits. W9425G6KH delivers a data bandwidth
of up to 400M words per second. To fully comply with the personal computer industrial standard,
W9425G6KH is sorted into two speed grades: 5 and -5I. The -5 and -5I grades are compliant to the
DDR400/CL3 specification (the -5I industrial grade which is guaranteed to support -40°C ≤ TA ≤ 85°C).
All Input reference to the positive edge of CLK (except for DQ, DM and CKE). The timing reference
point for the differential clock is when the CLK and CLK signals cross during a transition. Write and
Read data are synchronized with the both edges of DQS (Data Strobe).
By having a programmable Mode Register, the system can change burst length, latency cycle,
interleave or sequential burst to maximize its performance. W9425G6KH is ideal for main memory in
high performance applications.
2. FEATURES
 2.5V ± 0.2V Power Supply for DDR400
 Up to 200 MHz Clock Frequency
 Double Data Rate architecture; two data transfers per clock cycle
 Differential clock inputs (CLK and CLK )
 DQS is edge-aligned with data for Read; center-aligned with data for Write
 CAS Latency: 2, 2.5 and 3
 Burst Length: 2, 4 and 8
 Auto Refresh and Self Refresh
 Precharged Power Down and Active Power Down
 Write Data Mask
 Write Latency = 1
 7.8µS refresh interval (8K/64 mS refresh)
 Maximum burst refresh cycle: 8
 Interface: SSTL_2
 Packaged in TSOP II 66-pin, using Lead free materials with RoHS compliant
3. ORDER INFORMATION
PART NUMBER
W9425G6KH-5
W9425G6KH-5I
SPEED
DDR400/CL3
DDR400/CL3
SELF REFRESH
CURRENT (MAX.)
2 mA
2 mA
OPERATING
TEMPERATURE
0°C ~ 70°C
-40°C ~ 85°C
Publication Release Date: Nov. 17, 2014
Revision: A02
-4-