W78C801 Datasheet, PDF (4/18 Pages) Winbond – 8-BIT MICROCONTROLLER

W78C801
BLOCK DIAGRAM
P1.0
P1.7
P3.0
P3.7
P4.0
P4.6
Port
1
Port
3
Port
4
Port 1
Latch
INT2~9
Interrupt
Timer
0
Timer
1
Port 3
Latch
Port 4
Latch
ACC
T1
B
T2
PSW
Stack
ALU
Pointer
Port 0
Latch
DPTR
Temp Reg.
PC
Incrementor
Addr. Reg.
Instruction
Decoder
&
Sequencer
SFR RAM
Address
256 bytes
RAM & SFR
Bus & Clock
Controller
Port 2
Latch
Oscillator
Watchdog
Timer
Reset Block
Power control
XTAL1 XTAL2
ALE
PSEN
RST
VCC
Vss
P0.0
Port
0
P0.7
P2.0
Port
2
P2.7
FUNCTIONAL DESCRIPTION
The W78C801 architecture consists of a core controller surrounded by various registers, five general
purpose I/O ports, 256 bytes of RAM, two timer/counters. The processor supports 111 different
opcodes and references both a 64K program address space and a 64K data storage space.
Timers 0, 1
Timers 0, 1 each consist of two 8-bit data registers. These are called TL0 and TH0 for Timer 0, TL1
and TH1 for Timer 1. The TCON and TMOD registers provide control functions for timers 0 and 1.
The operations of Timer 0 and Timer 1 are the same as in the W78C51.
I/O Port Options
The Port 0 and Port 3 of W78C801 may be configured with different types by setting the bits of the
Port Options Register POR that is located at 86H. The pins of Port 0 can be configured with either the
open drain or standard port with internal pull-up. By the default, Port 0 is an open drain bi-directional
I/O port. When the PUP bit in the POR register is set, the pins of Port 0 will perform a quasi-bi-
directional I/O port with internal pull-up that is structurally the same as Port 2. The high nibble of Port
-4-