W39L512 Datasheet, PDF (4/25 Pages) Winbond – 64K 8 COMS FLASH MEMORY

W39L512
The manufacturer and device codes may also be read via the command register, for instance, when
the W39L512 is erased or programmed in a system without access to high voltage on the A9 pin. The
command sequence is illustrated in "Auto-select Codes".
Byte 0 (A0 = VIL) represents the manufacturer′s code (Winbond = DAH) and byte 1 (A0 = VIH) the
device identifier code (W39L512 = 38H). All identifiers for manufacturer and device will exhibit odd
parity with DQ7 defined as the parity bit. In order to read the proper device codes when executing the
Auto-select, A1 must be low state.
Data Protection
The W39L512 is designed to offer protection against accidental erasure or programming caused by
spurious system level signals that may exist during power transitions. During power up the device
automatically resets the internal state machine in the Read mode. Also, with its control register
architecture, alteration of the memory contents only occurs after successful completion of specific
multi-bus cycle command sequences. The device also incorporates several features to prevent
inadvertent write cycles resulting from VDD power-up and power-down transitions or system noise.
Boot Block Operation
There are two alternatives to set the boot block. The 8K-byte in the top/bottom location of this device
can be locked as boot block, which can be used to store boot codes. It is located in the last 8K bytes or
first 8K bytes of the memory with the address range from E000(hex) to FFFF(hex) for top location or
0000(hex) to 1FFF(hex) for bottom location.
See Command Codes for Boot Block Lockout Enable for the specific code. Once this feature is set the
data for the designated block cannot be erased or programmed (programming lockout), other memory
locations can be changed by the regular programming method.
In order to detect whether the boot block feature is set on the first/last 8K-byte block or not, users can
perform software command sequence: enter the product identification mode (see Command Codes for
Identification/Boot Block Lockout Detection for specific code), and then read from address 0002(hex)
for first(bottom) location or FFF2(hex) for last(top) location. If the DQ0/DQ1 of output data is "1,"
the 8Kbytes boot block programming lockout feature will be activated; if the DQ0/DQ1 of output data is
"0," the lockout feature will be inactivated and the block can be erased/programmed.
To return to normal operation, perform a three-byte command sequence (or an alternate single-byte
command) to exit the identification mode. For the specific code, see Command Codes for
Identification/Boot Block Lockout Detection.
Low VDD Inhibit
To avoid initiation of a write cycle during VDD power-up and power-down, the W39L512 locks out when
VDD < 2.0V (see DC Characteristics section for voltages). The write and read operations are inhibited
when VDD is less than 2.0V typical. The W39L512 ignores all write and read operations until VDD >
2,0V. The user must ensure that the control pins are in the correct logic state when VDD > 2.0V to
prevent unintentional writes.
Write Pulse "Glitch" Protection
Noise pulses of less than 10 nS (typical) on #OE, #CE, or #WE will not initiate a write cycle.
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