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W39V040FC Datasheet, PDF (3/36 Pages) Winbond – 512K × 8 CMOS FLASH MEMORY WITH FWH INTERFACE
W39V040FC
1. GENERAL DESCRIPTION
The W39V040FC is a 4-megabit, 3.3-volt only CMOS flash memory organized as 512K × 8 bits. For
flexible erase capability, the 4Mbits of data are divided into 16 x 8 Kbytes pages and 6 x 64 Kbytes
sectors or 8 x 64 Kbytes sectors. The device can be programmed and erased in-system with a standard
3.3V power supply. A 12-volt VPP is required for accelerated program. The unique cell architecture of
the W39V040FC results in fast program/erase operations with extremely low current consumption. This
device can operate at two modes, Programmer bus interface mode, Firmware Hub (FWH) bus interface
mode. As in the Programmer interface mode, it acts like the traditional flash but with a multiplexed
address inputs. But in the FWH interface mode, this device complies with the Intel FWH specification.
The device can also be programmed and erased using standard EPROM programmers.
2. FEATURES
y Single 3.3-volt operations:
− 3.3-volt Read
− 3.3-volt Erase
− 3.3-volt Program
y Fast Program operation:
− Byte-by-Byte programming: 7 μS (typ.) (VPP = 12V)
− Byte-by-Byte programming: 10 μS (typ.) (VPP = Vcc)
Fast Erase operation:
− Sector erase 0.6 Sec. (typ.)
− Page erase 0.3 Sec. (typ.)
y Fast Read access time: Tkq 11 nS
y Endurance: 50K cycles (typ.)
y Twenty-year data retention
y 6 Even sectors with 64K bytes
16 Even pages with 8K bytes or 8 Even sectors with 64 Kbytes
y Any individual sector/page can be erased
y Hardware protection:
− #TBL supports 64-Kbyte Boot Block hardware protection
− #WP supports the whole chip except Boot Block hardware protection
y Low power consumption
− Active current: 15 mA (typ. for FWH read mode)
y Automatic program and erase timing with internal VPP generation
y End of program or erase detection
− Toggle bit
− Data polling
y Latched address and data
y TTL compatible I/O
y Available packages: 32L PLCC, 32L STSOP
32L PLCC Lead free, 32L STSOP Lead free
Publication Release Date: Apr. 11, 2006
-3-
Revision A1