W49V002FA Datasheet, PDF (23/32 Pages) Winbond – 256K X 8 CMOS FLASH MEMORY WITH FWH INTERFACE

Timing Waveforms for FWH Interface Mode, continued
Program Cycle Timing Diagram
W49V002FA
CLK
#RESET
FWH4
FWH[3:0 ]
1st Start IDSEL
1110b 0000b
1 Clock 1 Clock
XXXXb
XXXXb
Address
XXXXb
X101b
0101b
0101b
Load Address "5555" in 7 Clocks
0101b
M Size
Data
TAR
Sync
TAR
Start next
command
0000b
1010b
1010b
1111b Tri-State 0000b 1111b Tri-State
Load Data "AA" in 2 Clocks 2 Clocks
1 Clock
2 Clocks
1 Clock
Write the 1st command to the device in FWH mode.
CLK
#RESET
FWH4
FWH[3:0 ]
2nd Start IDSEL
1110b 0000b
1 Clock 1 Clock
XXXXb
XXXXb
Address
M Size
Data
XXXXb
X010b
1010b
1010b
1010b
0000b
0101b
0101b
Load Address "2AAA" in 7 Clocks
Load Data "55"
in 2 Clocks
Write the 2nd command to the device in FWH mode.
TAR
Sync
TAR
Start next
command
1111b Tri-State 0000b 1111b Tri-State
2 Clocks
1 Clock
2 Clocks
1 Clock
CLK
#RESET
FWH4
3rd Start IDSEL
FWH[3:0 ]
1110b 0000b
1 Clock 1 Clock
XXXXb
XXXXb
Address
M Size
Data
XXXXb
X101b
0101b
0101b
0101b
0000b
0000b
1010b
Load Address "5555" in 7 Clocks
Load Data "A0"
in 2 Clocks
Write the 3rd command to the device in FWH mode.
TAR
Sync
1111b Tri-State 0000b
2 Clocks
1 Clock
TAR
Start next
command
1111b Tri-State
2 Clocks
1 Clock
CLK
#RESET
FWH4
4th Start ^IDSEL
FWH[3:0 ]
1110b 0000b
1 Clock 1 Clock
XXXXb
Address
XXXXb XXA[17:16]b A[15:12]
A[11:8]
Load Ain in 7 Clocks
A[7:4]
A[3:0]
Internal
program start
M Size
Data
TAR
Sync
TAR
0000b
D[3:0]
D[7:4]
Load Din in 2 Clocks
1111b Tri-State 0000b
2 Clocks
1 Clock
1111b Tri-State
2 Clocks
Internal
program start
Write the 4th command(target location to be programmed) to the device in FWH mode.
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Publication Release Date: February 19, 2002
Revision A2