W49V002FA Datasheet, PDF (21/32 Pages) Winbond – 256K X 8 CMOS FLASH MEMORY WITH FWH INTERFACE

W49V002FA
FWH INTERFACE MODE AC CHARACTERISTICS
AC Test Conditions
PARAMETER
Input Pulse Levels
Input Rise/Fall Slew Rate
Input/Output Timing Level
Output Load
CONDITIONS
0.6 VDD to 0.2 VDD
1 V/nS
0.4 VDD / 0.4 VDD
1 TTL Gate and CL = 10 pF
AC Test Load and Waveform
DOUT
10 pF
25 _Ω
Test when output from low to high
DOUT
10 pF
25 _Ω
V DD
Test when output from high to low
Input
Output
0.6V_DD
0.2VDD
0.4V_DD
0.4V_DD
Test Point
Test Point
Read/Write Cycle Timing Parameters
(VDD = 3.3V ± 5%, VGND = 0V, TA = 0 to 70° C)
PARAMETER
SYMBOL
Clock Cycle Time
Input Set Up Time
Input Hold Time
Clock to Data Valid
TCYC
TSU
THD
TKQ
W49V002FA
MIN.
MAX.
30
-
7
-
0
-
-
11
UNIT
nS
nS
nS
nS
Reset Timing Parameters
PARAMETER
SYM.
MIN.
TYP. MAX.
VDD stable to Reset Active
TPRST
1
-
-
Clock Stable to Reset Active
TKRST
100
-
-
Reset Pulse Width
TRSTP
100
-
-
Reset Active to Output Float
TRSTF
-
-
50
Reset Inactive to Input Active
TRST
1
-
-
Note: All AC timing signals observe the following guidelines for determining setup and hold times:
(a) High level signal's reference level is input high and (b) low level signal's reference level is input low.
Ref. to the AC testing condition.
UNIT
mS
µS
nS
nS
µS
- 21 -
Publication Release Date: February 19, 2002
Revision A2