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W78E51B_05 Datasheet, PDF (12/25 Pages) Winbond – 8-BIT MICROCONTROLLER
W78E51B
6.7.7 Program/Erase Inhibit Operation
This operation allows parallel erasing or programming of multiple chips with different data. When
P3.6( CE ) = VIH, P3.7( OE ) = VIH, erasing or programming of non-targeted chips is inhibited. So,
except for the P3.6 and P3.7 pins, the individual chips may have common inputs.
P3.0 P3.1 P3.2 P3.3 P3.6
OPERATIONS (A9 (A13 (A14 (OE
CTRL) CTRL) CTRL) CTRL) ( CE )
Read
0
0
0
0
0
P3.7
( OE )
0
EA
(VPP)
1
P2, P1
P0
NOTE
(A15..A0) (D7..D0)
Address Data Out
Output Disable 0
0
0
0
0
1
1
X
Hi-Z
Program
0
0
0
0
0
1 VCP Address Data In
Program
Verify
0
0
0
0
1
0 VCP Address Data Out @3
Erase
1
0
0
0
0
1
VEP
A0:0,
others: X
Data In
0FFH
@4
Erase Verify
1
0
0
0
1
0 VEP Address Data Out @5
Program/Erase
Inhibit
X
0
0
0
1
1
VCP/
VEP
X
X
Notes:
1. All these operations happen in RST = VIH, ALE = VIL and PSEN = VIH.
2. VCP = 12.5V, VEP = 14.5V, VIH = VDD, VIL = Vss.
3. The program verify operation follows behind the program operation.
4. This erase operation will erase all the on-chip Flash EPROM cells and the Security bits.
5. The erase verify operation follows behind the erase operation.
7. SECURITY BITS
During the programmer operation mode, the Flash EPROM can be programmed and verified
repeatedly. Until the code inside the Flash EPROM is confirmed OK, the code can be protected. The
protection of Flash EPROM and those operations on it are described below. The W78E51B has a
Special Setting Register, the Security Register, which can be accessed in normal mode. The register
can only be accessed from the Flash EPROM operation mode. Those bits of the Security Registers
can not be changed once they have been programmed from high to low. They can only be reset
through erase-all operation. The Security Register is addressed in the Flash EPROM operation mode
by address #0FFFFh.
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