W523A008 Datasheet, PDF (12/19 Pages) Winbond – HIGH FIDELITY POWER SPEECH

W523AXXX
The TG1 pin, which is pulled high with a 500KΩ resistor, should be kept high during non-transmission
periods to reduce power consumption. The external µC should be connected to the W523Axxx by an
inverted-type output port for better noise immunity. In CPU mode, the W523Axxx stops operating upon
the falling edge of the TG1 pin. For the CPU interface to work normally, TG1F should be disabled.
Thus, one suggestion is that TG1F, TG1R, TG2F, and TG2R should all be disabled in CPU mode. The
master frequency of the external µC, and hence the clock rate of TG1 and TG2, tends to vary among
different vendors and applications.
Note: In CPU mode application, in case the last voice group entry point, 255, is no used, it should be
typed “END” command to avoid abnormal operating.
Instruction Set List
There are two types of instruction in the W523Axxx, unconditional and conditional instructions. The
first types of instructions are executed immediately after they are issued. The second types of
instructions are executed only when the conditions specified in the instruction are satisfied. All the
instructions are listed in the following table. The cycle time for each instruction is 2/Sampling
Frequency (Fs). For example, Fs = 6.0 KHz, the cycle time is 333 µS.
JP
JP
LD
LD
LD
LD
LD
LD
END
MV
INC
UNCONDITIONAL
G
Rn
EN0, value
EN1, value
MODEi, value
STOP, value
PAGE, value
Rn, value
Rn, Rm
JP
JP
LD
LD
LD
LD
LD
LD
END
MV
INC
CONDITIONAL
G
Rn
EN0, value
EN1, value
MODEi, value
STOP, value
PAGE, value
Rn, value
Rn, Rm
@STS
@STS
@STS
@STS
@STS
@STS
@STS
@STS
@STS
@STS
@STS
Legend:
G: Interrupt vector/label
Rn: R0-R3
Rm: R0-R3
MODEi: MODE0, MODE1
value: 8-bit data
@STS can be the following: @LAST, @TGn_HIGH, @TGn_LOW, n = 1−4 (W523A008, W523A010),
n = 1,2,5,6 (W523A012~A120).
- 12 -