W78LE51 Datasheet, PDF (10/21 Pages) Winbond – 8-BIT MTP MICROCONTROLLER

Preliminary W78LE51
Continued
OPERATIONS P3.0 P3.1 P3.2 P3.3 P3.6
(A9 (A13 (A14 (OE _{( CE )}
CTRL) CTRL) CTRL) CTRL)
P3.7
( OE )
EA
(VPP)
P2,P1
P0
(A15..A0) (D7..D0)
NOTE
Program/Erase X
0
0
0
1
1 VCP/
X
X
Inhibit
VEP
Company ID
1
0
0
0
0
0
1 A0 = 0 Data Out
Device ID
1
0
0
0
0
0
1 A0 = 1 Data Out
Notes:
1. All these operations happen in RST = VIH, ALE = VIL and PSEN = VIH.
2. VCP = 12.5V, VEP = 14.5V, VIH = VDD, VIL = Vss.
3. The program verify operation follows behind the program operation.
4. This erase operation will erase all the on-chip MTP-ROM cells and the Security bits.
5. The erase verify operation follows behind the erase operation.
SECURITY BITS
During the on-chip MTP-ROM operation mode, the MTP-ROM can be programmed and verified
repeatedly. Until the code inside the MTP-ROM is confirmed OK, the code can be protected. The
protection of MTP ROM and those operations on it are described below. The W78LE51 has several
Special Setting Registers, including the Security Register and Company/Device ID Registers, which
can not be accessed in normal mode. These registers can only be accessed from the MTP-ROM
operation mode. Those bits of the Security Registers can not be changed once they have been
programmed from high to low. They can only be reset through erase-all operation. The contents of the
Company ID and Device ID registers have been set in factory. Both registers are addressed by the A0
address line during the same specific condition. The Security Register is addressed in the MTP-ROM
operation mode by address #0FFFFh.
D7 D6 D5 D4 D3 D2 D1 D0
11011010
Company ID (#DAH)
4KB MTP ROM
0000h
11100000
Device ID (#E0H)
Program Memory
B7 Reserved B2 B1 B0
Security Bits
Reserved
B0 : Lock bit, logic 0 : active
B1 : MOVC inhibit,
logic 0 : the MOVC instruction in external memory
cannot access the code in internal memory.
logic 1 : no restriction.
B2 : Encryption
logic 0 : the encryption logic enable
logic 1 : the encryption logic disable
Security Register
B7 : Osillator Control
logic 0 : 1/2 gain
logic 1 : Full gain
Default 1 for all security bits.
Reserved bits must be kept in logic 1.
Special Setting Registers
0FFFh
0FFFFh
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