W83194R-630_07 Datasheet, PDF (1/15 Pages) Winbond – 166MHZ CLOCK FOR SIS CHIPSET

W83194R-630/-630A Data Sheet
Table of Content-
166MHZ CLOCK FOR SIS CHIPSET
1. GENERAL DESCRIPTION ......................................................................................................... 2
2. PRODUCT FEATURES .............................................................................................................. 2
3. BLOCK DIAGRAM ...................................................................................................................... 3
4. PIN CONFIGURATION ............................................................................................................... 4
5. PIN DESCRIPTION..................................................................................................................... 4
5.1 Crystal I/O ....................................................................................................................... 4
5.2 CPU, SDRAM, PCI Clock Outputs ................................................................................ 5
5.3 I²C Control Interface ....................................................................................................... 6
5.4 Fixed Frequency Outputs ............................................................................................... 6
5.5 Power Pins...................................................................................................................... 6
6. FREQUENCY SELECTION BY HARDWARE ............................................................................ 7
7. SEL3.3_2.5# BUFFER SELECTION ......................................................................................... 7
8. FUNCTION DESCRIPTION........................................................................................................ 8
8.1 2-WIRE I2C CONTROL INTERFACE ............................................................................ 8
8.2 SERIAL CONTROL REGISTERS .................................................................................. 9
8.2.1 Frequency table by I2C ....................................................................................................9
8.2.2 Register 0: CPU Frequency Select Register (default = 0) .............................................10
8.2.3 Register 1 : CPU Clock Register (1 = Active, 0 = Inactive).............................................10
8.2.4 Register 2: PCI Clock Register (1 = Active, 0 = Inactive) ..............................................11
8.2.5 Register 3: Control Register (1 = Active, 0 = Inactive)...................................................11
8.2.6 Register 4: SDRAM Register (1 = Active, 0 = Inactive) ..................................................11
8.2.7 Register 5: SDRAM Register(1 = Active, 0 = Inactive) ...................................................12
8.2.8 Register 6: Winbond Chip ID Register (Read Only)......................................................12
9. ORDERING INFORMATION .................................................................................................... 12
10. HOW TO READ THE TOP MARKING...................................................................................... 13
11. PACKAGE DRAWING AND DIMENSIONS.............................................................................. 14
12. REVISION HISTORY ................................................................................................................ 15
Publication Release Date: May 13, 2005
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Revision A1