SESD5L5.0T1 Datasheet, PDF (2/4 Pages) WILLAS ELECTRONIC CORP – ESD Protection Diodes with Ultra−Low Capacitance

WILLAS
FM120-M+
SESD5L5.0T_T1_HRU
ES₁D_.0APr_So_Ut_Re_Fc_Ati_Co_En_MD_Oi_Uo_Nd_Te_Ss_Cw_Hi_Oth_TTU_Kl_Ytr_Ba_A−_RL_Ro_IEw_{RCRaEpCaTcIFiItEaRnSc-e20V- 200V}
FM1200-M+
SOD-123+ PACKAGE
Pb Free Product
ELECT_FR_eIC_aA_tL_uC_rH_eA_sRACTERISTICS
(T_A = 2_•5°_BC_au_tcn_hle_ps_rs_oo_ct_eh_se_srw_dis_ee_sin_go_nt_,e_ed)_{xcellent power dissipation offers}
Symbo^bl ^{etter reverse leakag}P^ea^cr^ua^rm^reeⁿte^t r^{and thermal resistance.}
• Low profile surface mounted application in order to
I_{PP opti}M_ma_izx_eim_bu_om_arR_de_sv_pe_ars_ce_e.Peak Pulse Current
V_C^{• Low}C^pla^om^wp^ei^rn^lg^osV^so^,lt^hag^ige^h@^efI^f_P^ic_P^iency.
• High current capability, low forward voltage drop.
V_RW•MH
i
g
Working Peak Reverse
h surge capability.
Voltage
I_R • GuaMrdarxinimgufmorRoevveerrvsoeltLaegaekapgroetCecutriroennt. @ V_RWM
V_BR^{• Ultra}Br^heⁱa^gk^hd^-o^sw^pen^eV^dol^sta^wgⁱe^tc@^hinI_T^g.
• Silicon epitaxial planar chip, metal silicon junction.
I_{T • Lead}Te_-fs_rt_eC_eu_prr_ae_rn_tst _{meet environmental standards of}
I_F
•
MIL_F-S_oT_rwD_a-_r1_d9_C5_u0_r0_re/_n2_t28
RoHS product for packing
code
suffix
"G"
V_{F Halo}F_go_er_nw_fa_rerd_eV_po_rolt_da_ug_ce_t@_forI_{Fpacking code suffix "H"}
P_pkMecPheaak nPoiwcear Dl idssaipattaion
C • EpoCxyap: aUcLit9an4c-Ve 0@raVt_Red=f0laamned rfe=ta1r.0daMnHt z
Package outline
I
I_F ^SOD-123H
0.146(3.7)
0.130(3.3)
V_C V_BR V_RWM
II_RT V_F
0.012(0.3) Typ.
V
0.071(1.8)
0.056(1.4)
I_PP
Uni−Directional TVS
0.040(1.0)
0.024(0.6)
*See A^•p^Cp^alic^sa^etio^: n^MN^oo^ldte ^dAN^plD^a8^s3^ti0^c8^,/^SD^Ofo^Dr ^-d¹e²ta³i^Hled explanations of
datas_•h_Te_ee_rt_mpa_inra_am_lse_:t_Pe_lr_as._ted
t
er
minals,
so
lde
rable
pe
r
M
IL-STD
-7
,
50
0.031(0.8) Typ.
0.031(0.8) Typ.
Method 2026
• Polarity : Indicated by cathode band
Dimensions in inches and (millimeters)
ELECTRICAL CHARACTERISTICS (T_A = 25°C unless otherwise noted, V_F = 1.0 V Max. @ I_F = 10 mA for all types)
• Mounting Position : Any
• Weight : Approximated_V0_R._W0_M11 gra_Im_{R (mA)}
V_BR (V) @ I_T
V_C (V)
@ I_PP = 1 A
MAXIMUM
(V)
RATINGS
@_ANV_{RDWEM LECT}(N_Ro_ICte_A2_L)
CHAR^ITACTER^CIS⁽T^pFIC⁾ S
(Note 3)
V_C
Rating_Ds_ea_vt_ic2_e5℃ amb_MDie_aen_rvt_kit_ice_nem_g pera_Mtu_are_x unless _Mot_ah_xerwise speci_Mfie_ind.
mA Typ Max
Max
Per IEC61000−4−2
(Note 4)
Single phase half wave, 60Hz, resistive of inductive load.
F^Sor^Ec^Sa^Dp⁵a^Lc⁵iti^.v⁰e^T1load, dera⁵t^Le current⁵b^.y⁰ 20% ^1.0
5.4
1.0 0.5 0.9
9.8
Figures 1 and 2
See Below
2. V_BR is measured w^Rit^Ah^Ta^INp^Gu^Slse test current I_T at a^Sn^Ya^Mm^Bb^Oie^Ln^Ft ^Mte¹m²⁰p^-Mer^Ha^Ftu^Mr¹e³o^0-f^M2^H5^F°C^M.^{140-MH FM150-MH FM160-MH FM180-MH FM1100-MH FM1150-MH FM1200-MH}
M3a.rkSinugrgCeodceurrent waveform per Figure 5.
12
13
14
15
16
18
10
115 120
M⁴a^.xi^Fm^ou^rm^teR^stec^pu^rorr^ce^en^dt ^uP^re^ea^sk^eR^ee^Fve^igrs^ue^reV^so³lta^agⁿe^{d 4 and Appli}V^caR^tR^ioM^{n Note}2^A0^ND83073^/0^D.
40
50
60
80
100
150
200
Maximum RMS Voltage
VRMS
14
21
28
35
42
56
70
105
140
Maximum DC Blocking Voltage
VDC
20
30
40
50
60
80
100
150
200
Maximum Average Forward Rectified Current
IO
1.0
Peak Forward Surge Current 8.3 ms single half sine-wave
superimposed on rated load (JEDEC method)
Typical Thermal Resistance (Note 2)
Typical Junction Capacitance (Note 1)
Operating Temperature Range
Storage Temperature Range
IFSM
RΘJA
CJ
TJ
TSTG
-55 to +125
30
40
120
- 65 to +175
-55 to +150
CHARACTERISTICS
Maximum Forward Voltage at 1.0A DC
Maximum Average Reverse Current at @T A=25℃
Rated DC Blocking Voltage
@T A=125℃
SYMBOL FM120-MH FM130-MH FM140-MH FM150-MH FM160-MH FM180-MH FM1100-MH FM1150-MH FM1200-MH
VF
0.50
0.70
0.85
0.9
0.92
IR
0.5
m
10
NOTES:
1- Measured at 1 MHZ and applied reverse voltage of 4.0 VDC.
2- Thermal Resistance From Junction to Ambient
Figure 1. ESD Clamping Voltage Screenshot
Positive 8 kV Contact per IEC61000−4−2
Figure 2. ESD Clamping Voltage Screenshot
Negative 8 kV Contact per IEC61000−4−2
2012-06
2012-09
WILLAS ELECTRONIC CORP
WILLAS ELECTRONIC CORP.