W3EG7235S-JD3 Datasheet, PDF (8/12 Pages) White Electronic Designs Corporation – 256MB - 2x16Mx72 DDR SDRAM REGISTERED ECC, w/PLL

White Electronic Designs
W3EG7235S-JD3
PRELIMINARY
DDR SDRAM COMPONENT ELECTRICAL CHARACTERISTICS AND
RECOMMENDED AC OPERATING CONDITIONS
0°C ≤ TA ≤ +70°C; VCC = +2.5V ±0.2V, VCCQ = +2.5V ±0.2V
AC Characteristics
262/265
202
Parameter
Symbol
Min
Max
Min
Max
Units
Access window of DQs from CK, CK#
tAC
-0.75
+0.75
-0.8
+0.8
ns
CK high-level width
tCH
0.45
0.55
0.45
0.55
tCK
CK low-level width
tCL
0.45
0.55
0.45
0.55
tCK
Clock cycle time
CL=2.5 tCK (2.5)
7.5
13
8
13
ns
CL=2
tCK (2)
7.5/10
13
10
13
ns
DQ and DM input hold time relative to DQS
tDH
0.5
0.6
ns
DQ and DM input setup time relative to DQS
tDS
0.5
0.6
ns
DQ and DM input pulse width (for each input)
tDIPW
1.75
2
ns
Access window of DQS from CK, CK#
tDQSCK
-0.75
+0.75
-0.8
+0.8
ns
DQS input high pulse width
tDQSH
0.35
0.35
tCK
DQS input low pulse width
tDQSL
0.35
0.35
tCK
DQS-DQ skew, DQS to last DQ valid, per group, per access tDQSQ
0.5
0.6
ns
Write command to first DQS latching transition
tDQSS
0.75
1.25
0.75
1.25
tCK
DQS falling edge to CK rising - setup time
tDSS
0.2
0.2
tCK
DQS falling edge from CK rising - hold time
tDSH
0.2
0.2
tCK
Half clock period
tHP
tCH, tCL
tCH, tCL
ns
Data-out high-impedance window from CK, CK#
tHZ
+0.75
+0.8
ns
Data-out low-impedance window from CK, CK#
tLZ
-0.75
-0.8
ns
Address and control input hold time (fast slew rate)
tIHf
0.90
1.1
ns
Address and control input set-up time (fast slew rate)
tISf
0.90
1.1
ns
Address and control input hold time (slow slew rate)
tIHs
1
1.1
ns
Address and control input setup time (slow slew rate)
tISs
1
1.1
ns
Address and control input pulse width (for each input)
tIPW
2.2
2.2
ns
LOAD MODE REGISTER command cycle time
tMRD
15
16
ns
DQ-DQS hold, DQS to first DQ to go non-valid, per access
tQH
tHP-tQHS
tHP-tQHS
ns
Data hold skew factor
tQHS
0.75
1
ns
ACTIVE to PRECHARGE command
tRAS
40
120,000
40
120,000
ns
ACTIVE to READ with Auto precharge command
tRAP
15
20
ns
ACTIVE to ACTIVE/AUTO REFRESH command period
tRC
60
70
ns
AUTO REFRESH command period
tRFC
75
80
ns
Notes
16
16
22
22
14,17
14,17
17
13,14
18
8,19
8,20
6
6
6
6
13,14
15
21
November 2004
Rev. 2
8
White Electronic Designs Corporation • [phone] • www.wedc.com