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W3H64M72E-XSBX Datasheet, PDF (20/30 Pages) White Electronic Designs Corporation – 64M x 72 DDR2 SDRAM 208 PBGA Multi-Chip Package | |||
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White Electronic Designs
W3H64M72E-XSBX
ADVANCED*
FIGURE 12 â WRITE COMMAND
CK#
CK
CKE HIGH
CS#
RAS#
CAS#
WE#
ADDRESS
A10
BANK ADDRESS
CA
EN AP
DIS AP
BA
DONâT CARE
Note: CA = column address; BA = bank address; EN AP = enable auto precharge; and
DIS AP = disable auto precharge.
TABLE 4 â WRITE USING CONCURRENT AUTO PRECHARGE
From Command (Bank n)
WRITE with Auto Precharge
To Command (Bank m)
READ OR READ w/AP
WRITE or WRITE w/AP
PRECHARGE or ACTIVE
Minimum Delay (With Concurrent
Auto Precharge)
(CL-1) + (BL/2) + tWTR
(BL/2)
1
Units
tCK
tCK
tCK
White Electronic Designs Corp. reserves the right to change products or speciï¬cations without notice.
March 2006
Rev. 1
20
White Electronic Designs Corporation ⢠(602) 437-1520 ⢠www.wedc.com
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