VG36648041CT Datasheet, PDF (66/70 Pages) Vanguard International Semiconductor – CMOS Synchronous Dynamic RAM

VIS
Preliminary
VG36648041CT
CMOS Synchronous Dynamic RAM
Full Page Random Column Read
Burst Length=Full Page, CAS Latency=2
T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T11 T12 T13 T14 T15 T16 T17 T18 T19 T20 T21 T22
CLK
t
CK2
CKE
CS
RAS
CAS
WE
BS
A10
Ra
Ra
Rb
ADD
Ra
Ra Ca Ca Cb
Cb
Cc
Cc
Rb
tRP
DQM
Hi-Z
DQ
QAa0 QBa0 QAb0 QAb1 QBb0 QBb1 QAc0 QAc1 QAc2 QBc0 QBc1 QBc2
Activate
Command
Bank A
Activate
Command
Bank B
(Bank D)
Read
Command
Bank B
(Bank D)
Read
Command
Bank B
(Bank D)
Read
Command
Bank A
Read
Command
Bank A
Read
Command
Bank A
Read
Command
Bank B
(Bank D)
Precharge
Command Bank B(Bank D)
(Precharge Termination)
Activate
Command
Bank B
(Bank D)
Document : 1G5-0153
Rev.1
Page 66