VSC7140 Datasheet, PDF (9/12 Pages) Vitesse Semiconductor Corporation – 1.0625 Gb/s Fibre Channel Dual Repeater / Hub Node

Data Sheet
VSC7140
VITESSE
SEMICONDUCTOR CORPORATION
1.0625 Gb/s Fibre Channel
Dual Repeater / Hub Node
Table 2: Pin Identification
Pin #
46, 45
21, 20
39, 38
28, 27
42, 41
25, 24
36, 35
31, 30
3
15
16
51
1
12, 13
17
49, 50, 2
5, 11, 19, 26
40, 47
29, 37
8
4, 7, 10, 14
23, 33, 43, 52
6,18,48
9,22,32, 34,
44
Name
RX1+, RX1-
RX2+, RX2-
TX1+, TX1-
TX2+, TX2-
SI1+, SI1-SI2+,
SI2-
SO1+, SO1-
SO2+, SO2-
SEL1
SEL2
HUB
REFCLK
REFSEL
FAIL1-
FAIL2-
ERRSEL
TEST1
TEST2
TEST3
VDD
VDDP
VDDA
VSS
INC_VDD
INC_VSS
Description
INPUT - Differential. Serial input to CRU1/CRU2. (AC Coupling recommended)
(Biased internally at V_DD/2)
OUTPUT - Differential. Serial output from PBC1/PBC2. (AC Coupling recommended)
INPUT - Differential. Serial input. (AC Coupling recommended) (Biased internally at
V_DD/2)
OUTPUT - Differential. Serial output from PBCx to disk drive ‘x’. (AC Coupling
recommended).
INPUT - TTL. SEL1 configures PBC1 to select either the output of CRU1 (HIGH) or
SI1 (LOW) to drive SO1.
INPUT - TTL. SEL2 configures PBC2 to select either the output of CRU2 (HIGH) or the
output of PBC3 (LOW) to drive SO2.
INPUT - TTL. HUB configures PBC3 to select either the ouput of PBC1 (HIGH) or SI2
(LOW) to drive the input to PBC2.
INPUT - TTL. REFerence CLocK at 1/10th or 1/20th the baud rate (Nominally 53.125
or 106.25 MHz) as determined by REFSEL. Used for internal clock multiplier unit.
INPUT - TTL. REFclk SELect. When HIGH, REFCLK is 1/10th the baud rate and
would normally be 106.25 MHz. When LOW, REFCLK is 1/20th the baud rate (53.125
MHz)
OUTPUT - TTL. When LOW, indicates that the output of CRU1/2 contains invalid
Fibre Channel data.
INPUT - TTL. Selects the algorithm to drive the FAIL1-/FAIL2- outputs. When HIGH,
the “Multiple Frame Error Mode” is used. When LOW, the “Single Frame Error Mode”
is selected.
INPUT - TTL. LOW for factory test, HIGH for normal operation.
Power Supply. 3.3V Supply.
High-Speed Output Power Supply. 3.3V Supply for PECL drivers.
Analog Power Supply. 3.3V for Clock Multiplier PLL. Bypass to pin 7.
Ground.
Internally Not Connected. Connect these pins to VDD for compatibility with future
versions of the VSC7140.
Internally Not Connected. Connect these pins to VSS for compatibility with future
versions of the VSC7140.
G52180-0, Rev 4.0
10/23/00
© VITESSE SEMICONDUCTOR CORPORATION • 741 Calle Plano • Camarillo, CA 93012
Tel: (800) VITESSE • FAX: [phone] • Email: [e-mail]
Internet: www.vitesse.com
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