VSC8163 Datasheet, PDF (1/20 Pages) Vitesse Semiconductor Corporation – OC-48 16:1 SONET/SDH MUX with Clock Generator

VITESSE
SEMICONDUCTOR CORPORATION
Preliminary Data Sheet
VSC8163
OC-48 16:1 SONET/SDH
MUX with Clock Generator
Features
• 2.488Gb/s 16:1 Multiplexer
• Targeted for SONET OC-48 / SDH STM-16
Applications
• Differential LVPECL Low-Speed Interface
• On-Chip PLL-Based Clock Generator
• 128 Pin, 14x20mm PQFP Package
• Single +3.3V Supply
General Description
The VSC8163 is a 16:1 multiplexer with integrated clock generator for use in SONET/SDH systems oper-
ating at a 2.48832Gb/s data rate. The internal clock generator uses a Phase-Locked Loop (PLL) to multiply
either a 77.76MHz or 155.52MHz reference clock in order to provide the 2.48832GHz clock for internal logic
and output retiming. The 16-bit parallel interface incorporates an on-board FIFO, eliminating loop timing
design issues by providing a flexible parallel timing architecture. The device operates using a +3.3V power sup-
ply, and is packaged in a thermally-enhanced plastic package. The thermal performance of the 128PQFP allows
the use of the VSC8163 without a heat sink under most thermal conditions.
VSC8163 Block Diagram
CLK16I+
CLK16I-
D0+
D0-
D15+
D15-
REFCLKO+
REFCLKO-
Reset
CLK16O+
CLK16O-
REFCLK+
REFCLK
REF_FREQSEL
Write
Pointer
Output
Retime
Read
Pointer
FIFO
Control
Divide by 16
Divide 2.488GHz
by 2
PLL
DO+
DO-
CLKO+
CLKO-
FIFO_WARN
G52216-0, Rev 3.3
01/05/01
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Tel: (800) VITESSE • FAX: [phone] • Email: [e-mail]
Internet: www.vitesse.com
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