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DG411L Datasheet, PDF (8/9 Pages) Vishay Siliconix – Precision Monolithic Quad SPST Low-Voltage CMOS Analog Switches
DG411L/412L/413L
Vishay Siliconix
SCHEMATIC DIAGRAM (TYPICAL CHANNEL)
V+
VL
VIN
GND
V-
Level
Shift/
Drive
FIGURE 1.
S
V-
V+
D
TEST CIRCUITS
VL
VL
S
VS
IN
GND
V+
V+
D
V-
V-
RL
300 W
VO
CL
35 pF
Logic
3V
Input
0V
Switch
Input*
VS
Switch
0V
Output
Switch
Input*
VO
-V S
50%
VO
90%
tr <20 ns
tf <20 ns
tON
tON
90%
CL (includes fixture and stray capacitance)
VO = VS
RL
RL + rDS(on)
Note: Logic input waveform is inverted for switches that
have the opposite logic sense control
FIGURE 2. Switching Time
VL
VS1
S1
IN1
VS2
S2
IN2
GND
V+
D1
VO1
D2
VO2
RL1
300 W
CL1
35 pF
V-
RL2
300 W
CL2
35 pF
Logic
3V
Input
0V
VS1
VO1
Switch
0V
Output
VS2
VO2
Switch
0V
Output
50%
90%
90%
tD
tD
V-
CL (includes fixture and stray capacitance)
FIGURE 3. Break-Before-Make (DG413L)
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Document Number: 71397
S-21452—Rev. C, 26-Aug-02