IRF9510STRLPBF Datasheet, PDF (7/9 Pages) Vishay Siliconix – Power MOSFET

IRF9510S, SiHF9510S
Vishay Siliconix
D.U.T.
+
-
Peak Diode Recovery dV/dt Test Circuit
+
Circuit layout considerations
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
-
R_g
• dV/dt controlled by R_g
+
• I_SD controlled by duty factor “D”
• D.U.T. - device under test
- ^VDD
Note
• Compliment N-Channel of D.U.T. for driver
Driver gate drive
P.W.
Period
D=
P.W.
Period
V_GS = - 10 V^a
D.U.T. l_SD waveform
Reverse
recovery
Body diode forward
current
D.U.T. V_DS waveform
current
dI/dt
Diode recovery
dV/dt
V_DD
Re-applied
voltage
Body diode forward drop
Inductor current
Ripple ≤ 5 %
I_SD
Note
a. V_GS = - 5 V for logic level and - 3 V drive devices
Fig. 14 - For P-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?91073.
Document Number: 91073
S11-1050-Rev. C, 30-May-11
www.vishay.com
7
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000