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DG411HS_11 Datasheet, PDF (7/17 Pages) Vishay Siliconix – Precision Monolithic Quad SPST CMOS Analog Switches
SCHEMATIC DIAGRAM (Typical Channel)
DG411HS, DG412HS, DG413HS
Vishay Siliconix
V+
VL
VIN
GND
V-
TEST CIRCUITS
Level
Shift/
Drive
Figure 1.
S
V-
V+
D
± 10 V
+5V
VL
S
IN
GND
+ 15 V
V+
D
V-
RL
300 Ω
VO
CL
35 pF
Logic
3V
Input
0V
Switch
Input*
VS
0V
50 %
tr < 5 ns
tf < 5 ns
tOFF
VO
90 %
90 %
tON
- 15 V
CL (includes fixture and stray capacitance)
VO = VS
RL
RL + rDS(on)
Note: Logic input waveform is inverted for switches that
have the opposite logic sense control
Figure 2. Switching Time
+5V
VL
VS1
S1
IN1
VS2
S2
IN2
GND
+ 15 V
V+
D1
VO1
D2
VO2
RL1
300 Ω
CL1
35 pF
V-
RL2
300 Ω
CL2
35 pF
Logic
3V
Input
0V
VS1
VO1
Switch
0V
Output
VS2
VO2
Switch
0V
Output
50 %
90 %
90 %
tD
tD
- 15 V
CL (includes fixture and stray capacitance)
Figure 3. Break-Before-Make (DG413HS)
Document Number: 72053
S11-0179-Rev. C, 07-Feb-11
www.vishay.com
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