72342 Datasheet, PDF (7/10 Pages) Vishay Siliconix – Low Voltage, Dual DPDT and Quad SPDT Analog Switches

TEST CIRCUITS
DG2018, DG2019
Vishay Siliconix
Switch
Input
Logic
Input
V+
V+
NO or NC
COM
IN
GND
0V
Switch Output
V_OUT
R_L
300 Ω
C_L
35 pF
Logic
Input
V_INH
V_INL
50 %
Switch
Output
0V
t_ON
t_r < 5 ns
t_f < 5 ns
0.9 x V_OUT
t_OFF
C_L (includes fixture and stray capacitance)
V_OUT =
V_COM
R_L
R_L + R_ON
Logic "1" = Switch On
Logic input waveforms inverted for switches that have
the opposite logic sense.
Figure 1. Switching Time
V+
V_gen
R_gen
+
V_IN = 0 - V+
V+
NC or NO
IN
GND
COM
V_OUT
V_OUT
ΔV_OUT
C_L = 1 nF
IN
On
Off
On
Q = ΔV_OUT x C_L
IN depends on switch configuration: input polarity
determined by sense of switch.
Figure 2. Charge Injection
V_NO
V_NC
V+
NO
COM
NC
IN
GND
R_L
50 Ω
V_O
C_L
35 pF
Logic _VINH
Input
V_INL
V_NC = V_NO
V_O
Switch _{0 V}
Output
90 %
t_D
t_r < 5 ns
t_f < 5 ns
t_D
C_L (includes fixture and stray capacitance)
Figure 3. Break-Before-Make Interval
Document Number: 72342
S-82626-Rev. C, 03-Nov-08
www.vishay.com
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