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VS-FA40SA50LC Datasheet, PDF (6/10 Pages) Vishay Siliconix – Low on-resistance
www.vishay.com
1000
OPERATION IN THIS AREA LIMITED
BY RDS(on)
100
10 μs
100 μs
10
1 ms
TC = 25 °C
TJ = 150 °C
Single Pulse
11
10
10 ms
100
1000
VDS, Drain-to-Source Voltage (V)
10 000
Fig. 16 - Maximum Safe Operating Area
VDS
VGS
RG
RD
D.U.T.
+
-
VDD
10 V
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %
Fig. 17 - Switching Time Test Circuit
VDS
90%
0%
GS
td(on) tr
td(off) tf
Fig. 18 - Switching Time Waveforms
15 V
L
VDS
RG
20 V
tp
D.U.T
IAS
0.01 Ω
Driver
+
- VDD
A
Fig. 19 - Unclamped Inductive Test Circuit
VS-FA40SA50LC
Vishay Semiconductors
V(BR)DSS
tp
I AS
Fig. 20 - Unclamped Inductive Waveforms
10V
QGS
VG
QG
QGD
Charge
Fig. 21 - Basic Gate Charge Waveform
Current regulator
Same type as D.U.T.
12 V
50 KΩ
.2 µF
.3 µF
D.U.T.
+
- VDS
VGS
3 mA
IG
ID
Current sampling resistors
Fig. 22 - Gate Charge Test Circuit
Revision: 01-Jun-16
6
Document Number: 94803
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