DG2016_08 Datasheet, PDF (6/7 Pages) Vishay Siliconix – High-Bandwidth, Low Voltage, Dual SPDT Analog Switches

DG2016/DG2026
Vishay Siliconix
TEST CIRCUITS
V+
V+
NO
V_NO
COM
NC
V_NC
IN
GND
R_L
50 Ω
V_O
C_L
35 pF
Logic _VINH
Input
V_INL
V_NC = V_NO
V_O
Switch _{0 V}
Output
90 %
t_D
t_r < 5 ns
t_f < 5 ns
t_D
C_L (includes fixture and stray capacitance)
Figure 2. Break-Before-Make Interval
V+
V_gen
R_gen
+
V_IN = 0 - V+
V+
NC or NO
IN
GND
COM
V_OUT
V_OUT
ΔV_OUT
C_L = 1 nF
IN
On
Off
On
Q = ΔV_OUT x C_L
IN depends on switch configuration: input polarity
determined by sense of switch.
Figure 3. Charge Injection
V+
10 nF
V+
NC or NO
IN
COM _COM
R_L
GND
Analyzer
V_COM
Off Isolation = 20 log _{VNO/ NC}
Figure 4. Off-Isolation
0 V, 2.4 V
V+
10 nF
V+
COM
IN
0 V, 2.4 V
NC or NO
GND
Meter
HP4192A
Impedance
Analyzer
or Equivalent
f = 1 MHz
Figure 5. Channel Off/On Capacitance
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Tech-
nology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability
data, see http://www.vishay.com/ppg?72030.
www.vishay.com
6
Document Number: 72030
S-71009-Rev. C, 14-May-07