SI9110_11 Datasheet, PDF (5/9 Pages) Vishay Siliconix – High-Voltage Switchmode Controllers

Si9110, Si9111
Vishay Siliconix
PIN CONFIGURATIONS AND ORDERING INFORMATION
Dual-In-Line and SOIC
BIAS ₁
+V_IN 2
SENSE 3
OUTPUT 4
- V_{IN 5}
V_CC 6
OSC OUT 7
14 ^FB
13 COMP
12 RESET
11 SHUTDOWN
10 ^VREF
9 DISCHARGE
8 OSC IN
Top View
DETAILED DESCRIPTION
Pre-Regulator/Start-Up Section
Due to the low quiescent current requirement of the Si9110/
9111 control circuitry, bias power can be supplied from the
unregulated input power source, from an external regulated
low-voltage supply, or from an auxiliary "bootstrap" winding
on the output inductor or transformer.
When power is first applied during start-up, + V_IN (pin 2) will
draw a constant current. The magnitude of this current is
determined by a high-voltage depletion MOSFET device
which is connected between + V_IN and V_CC (pin 6). This
start-up circuitry provides initial power to the IC by charging
an external bypass capacitance connected to the V_CC pin.
The constant current is disabled when V_CC exceeds 8.6 V. If
V_CC is not forced to exceed the 8.6 V threshold, then V_CC will
be regulated to a nominal value of 8.6 V by the pre-regulator
circuit.
As the supply voltage rises toward the normal operating
conditions, an internal undervoltage (UV) lockout circuit
keeps the output driver disabled until V_CC exceeds the
undervoltage lockout threshold (typically 8.1 V). This
guarantees that the control logic will be functioning properly
and that sufficient gate drive voltage is available before the
MOSFET turns on. The design of the IC is such that the
undervoltage lockout threshold will be at least 300 mV less
than the pre-regulator turn-off voltage. Power dissipation can
be minimized by providing an external power source to V_CC
such that the constant current source is always disabled.
Note: During start-up or when V_CC drops below 8.6 V the
start-up circuit is capable of sourcing up to 20 mA. This may
lead to a high level of power dissipation in the IC (for a 48 V
input, approximately 1 W). Excessive start-up time caused
by external loading of the V_CC supply can result in device
damage. Figure 6 gives the typical pre-regulator current at
BiC/DMOS as a function of input voltage.
BIAS
To properly set the bias for the Si9110/9111, a 390 k
resistor should be tied from BIAS (pin 1) to - V_IN (pin 5). This
determines the magnitude of bias current in all of the analog
ORDERING INFORMATION
Part Number
Temperature Range
Si9110DY
Si9110DY-T1
Si9110DY-T1-E3
Si9111DY
Si9111DY-T1
Si9111DY-T1-E3
- 40 °C to 85 °C
Si9110DJ
Si9110DJ-E3
Si9111DJ
Si9111DJ-E3
Package
SOIC-14
PDIP-14
sections and the pull-up current for the SHUDOWN and
RESET pins. The current flowing in the bias resistor is
nominally 15 µA.
Reference Section
The reference section of the Si9110 consists of a
temperature compensated buried zener and trimmable
divider network. The output of the reference section is
connected internally to the non-inverting input of the error
amplifier. Nominal reference output voltage is 4 V. The
trimming procedure that is used on the Si9110 brings the
output of the error amplifier (which is configured for unity gain
during trimming) to within ± 1 % of 4 V. This compensates for
input offset voltage in the error amplifier.
The output impedance of the reference section has been
purposely made high so that a low impedance external
voltage source can be used to override the internal voltage
source, if desired, without otherwise altering the
performance of the device.
Applications which use a separate external reference, such
as non-isolated converter topologies and circuits employing
optical coupling in the feedback loop, do not require a
trimmed voltage reference with 1 % accuracy. The Si9111
accommodates the requirements of these applications at a
lower cost, by leaving the reference voltage untrimmed. The
10 % accurate reference thus provided is sufficient to
establish a dc bias point for the error amplifier.
Error Amplifier
Closed-loop regulation is provided by the error amplifier,
which is intended for use with "around-the-amplifier"
compensation. A MOS differential input stage provides for
low input current. The noninverting input to the error amplifier
(V_REF) is internally connected to the output of the reference
supply and should be bypassed with a small capacitor to
ground.
Document Number: 70004
www.vishay.com
S11-0975-Rev. I, 16-May-11
5
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000