DG200A Datasheet, PDF (5/5 Pages) TEMIC Semiconductors – Monolithic Dual SPST CMOS Analog Switch

DG200A_MIL
Vishay Siliconix
TEST CIRCUITS
V_O is the steady state output with switch on. Feedthrough via gate capacitance may result in spikes at leading and trailing edge of output waveform.
+15 V
3V
Logic
Input
0V
Switch
Input
V_S
Switch
Output
V_O
50%
90%
t_r <20 ns
t_f <20 ns
t_OFF
V_S = +5 V
3V
V+
S
D
IN
GND
V–
R_L
1 kW
V_O
C_L
35 pF
t_ON
–15 V
R_L
FIGURE 2. Switching Time
V_O = V_S
R_L + r_DS(on)
+15 V
V+
R_g
S
D
V_O
DV_O
V_O
V_g
IN
3V
GND
V–
C_L
1000 pF
IN_X ON
OFF
ON
–15 V
DV_O = measured voltage error due to charge injection
The charge injection in coulombs is DQ = C_L x DV_O
FIGURE 3. Charge Injection
+15 V
C
V+
V_S
S
D
V_O
R_g = 50 W
IN
R_L
5V
GND
V–
C
–15 V
V_S
Off Isolation = 20 log
V_O
FIGURE 4. Off Isolation
Document Number: 70035
S-02314—Rev. E, 05-Oct-00
+15 V
C
V_S
R_g = 50 W
0V
NC
0V
V+
S₁
D₁
IN₁
S₂
D₂
IN₂
GND
V–
C
50 W
V_O
R_L
–15 V
V_S
X_TALK = 20 log
V_O
C = RF bypass
FIGURE 5. Channel-to-Channel Crosstalk
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