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SI9910_05 Datasheet, PDF (2/6 Pages) Vishay Siliconix – Adaptive Power MOSFET Driver
Si9910
Vishay Siliconix
ABSOLUTE MAXIMUM RATINGS
Voltages Referenced to VSS Pin
VDD Supply Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 18 V
Pin 1, 4, 5, 7, 8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to VDD + 0.3 V
Pin 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.7 V to VDD + 0.3 V
Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . "20 mA
Peak Current (Ipk) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 A
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65 to 150_C
Operating Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40 to 85_C
Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150_C
Power Dissipation (Package)a
8-Pin SOIC (Y Suffix)b . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 700 mW
8-Pin Plastic DIP (J Suffix)b . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 700 mW
Notes
a. Device mounted with all leads soldered or welded to PC board.
b. Derate 5.6 mW/_C above 25_C.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
SPECIFICATIONSa
Input
Parameter
Symbol
Test Conditions
Unless Otherwise Specified
VDD 10.8 V to 16.5 V
TA = OperatingTemperature Range
Minc
High Level Input Voltage
Low Level Input Voltage
Input Voltage Hysteresis
High Level Input Current
Low Level Input Current
Output
VIH
0.70 x VDD
VIL
Vh
0.90
IIH
VIN = VDD
IIL
VIN = 0 V
High Level Output Voltage
Low Level Output Voltage
Undervoltage Lockout
ISENSE Pin Threshold
Voltage Drain-Source Maximum
Input Current for VDS Input
Peak Output Source Current
Peak Output Sink Current
Supply
VOH
VOL
VUVLO
VTH
VDS
IVDS
IOS+
IOS−
IOH = −200 mA
IOL = 200 mA
Max IS = 2 mA, Input High
100 mV Change on Drain
Input High
VDD −3
8.3
0.5
8.3
Supply Range
Supply Current
Dynamic
VDD
IDD1
Output High, No Load
IDD2
Output Low, No Load
10.8
Propagation Delay Time Low to High Level
tPLH
Propagation Delay Time High to Low Level
tPHL
Rise Time
tr
Fall Time
tf
Overcurrent Sense Delay (VDS)
tDS
Input Capacitance
Cin
CL = 2000 pF
Notes
a. Refer to PROCESS OPTION FLOWCHART for additional information.
b. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
c. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum.
Limits
Typb
Maxc
7.4
6.0
0.35 x VDD
2.0
3.0
"1
"1
10.7
1.3
3
9.2
10.6
0.66
0.8
9.1
10.2
12
20.0
1
−1
16.5
0.1
1
100
500
120
135
50
35
1
5
Unit
V
mA
V
mA
A
V
mA
ns
mS
pF
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2
Document Number: 70009
S-42043—Rev. H, 15-Nov-04