SI9161 Datasheet, PDF (2/12 Pages) Vishay Siliconix – Optimized-Efficiency Controller for RF Power Amplifier Boost Converter

Si9161
Vishay Siliconix
ABSOLUTE MAXIMUM RATINGS
Voltages Referenced to GND.
V_DD, V_S . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
P_GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±0.3 V
Linear Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to V_DD +0.3 V
Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to V_DD +0.3 V
Peak Output Drive Current . . . . . . . . . . . . . . . . . . . . . . . . . . . 350 mA
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . -65 to 150°C
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . 150°C
Power Dissipation (Package)^a
16-Pin TSSOP (Q Suffix)^{a, b} . . . . . . . . . . . . . . . . . . . . . . . . . 925 mW
Thermal Impedance (Θ_JA)^a
16-Pin TSSOP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .135°C/W
Notes
a. Device mounted with all leads soldered or welded to PC board.
b. Derate 7.4 mW/°C above 25°C.
Exposure to Absolute Maximum rating conditions for extended periods may affect device reliability. Stresses above Absolute Maximum rating may cause permanent
damage. Functional operation at conditions other than the operating conditions specified is not implied. Only one Absolute Maximum rating should be applied at any
one time.
SPECIFICATIONS
Parameter
Symbol
Test Conditions
Unless Otherwise Specified^a
LL = V_DD, 2.7 V ≤ V_DD, V_S ≤ 6.0 V, GND = P_GND
Reference
Output Voltage
V_REF
I_REF = -10 µA
TA = 25°C
Oscillator
Maximum Frequency^c
f_MAX
V_DD = 5 V, C_OSC = 47 pF, R_OSC = 5.0 kΩ
Oscillator Frequency
Accuracy
V_DD = 3.0 V, f_OSC = 1 MHz (nominal)
C_OSC = 100 pF, R_OSC = 7.0 kΩ, T_A = 25°C
R_OSC Peak Voltage
Voltage Stability^c
Temperature Stability^c
V_ROSC
∆f/f
4 V ≤ V_DD ≤ 6 V, Ref to 5 V, T_A = 25°C
Referenced to 25°C
Light-Load Frequency^c
f_LL
LL = 0 V, C_OSC = 100 pf, R_OSC = 7.0 kΩ
Error Amplifier (C_OSC = GND, OSC Disabled)
Input Bias Current
I_B
V_NI = V_REF , V_FB = 1.0 V
Open Loop Voltage Gain
A_VOL
Offset Voltage
V_OS
Unity Gain Bandwidth^c
BW
V_NI = V_REF
Output Current
I_OUT
Power Supply Rejection^c
PSRR
UVLO_SET Voltage Monitor
Under Voltage Lockout
Hysteresis
UVLO Input Current
V_UVLOHL
V_UVLOLH
V_HYS
I_UVLO(SET)
Source (V_FB = 1 V, NI = V_REF)
Sink (V_FB = 2 V, NI = V_REF)
4 V < V_DD < 6 V
UVLO_SET High to Low
UVLO_SET Low to High
V_UVLOLH - V_UVLOHL
V_UVLO = 0 to V_DD
Limits
B Suffix -25 to 85°C
Min^b
Typ
Max^b
1.455
1.477
1.50
1.545
1.523
2.0
-15
15
1.0
-8
8
±5
115
-1.0
1.0
47
55
-15
0
15
10
-2.0
-1.0
0.4
0.8
60
0.85
1.0
1.15
1.2
200
-100
100
Unit
V
MHz
%
V
%
kHz
µA
dB
mV
MHz
mA
dB
V
mV
nA
S-60752—Rev. B, 05-Apr-99
2
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