SI7222DN Datasheet, PDF (2/14 Pages) Vishay Siliconix – Dual N-Channel 40 V (D-S) MOSFET

Si7222DN
Vishay Siliconix
THERMAL RESISTANCE RATINGS
Parameter
Maximum Junction-to-Ambient^{a, b}
Maximum Junction-to-Case (Drain)
t ≤ 10 s
Steady State
Notes:
a. Surface Mounted on 1" x 1" FR4 board.
b. Maximum under Steady State conditions is 94 °C/W.
Symbol
R_thJA
R_thJC
Typical
38
5.5
Maximum
50
7
Unit
°C/W
SPECIFICATIONS T_J = 25 °C, unless otherwise noted
Parameter
Symbol
Test Conditions
Static
Drain-Source Breakdown Voltage
V_DS
V_GS = 0 V, I_D = 250 µA
V_DS Temperature Coefficient
V_GS(th) Temperature Coefficient
ΔV_DS/T_J
ΔV_GS(th)/T_J
I_D = 250 µA
Gate-Source Threshold Voltage
V_GS(th)
V_DS = V_GS, I_D = 250 µA
Gate-Source Leakage
I_GSS
V_DS = 0 V, V_GS = ± 12 V
Zero Gate Voltage Drain Current
I_DSS
V_DS = 40 V, V_GS = 0 V
V_DS = 40 V, V_GS = 0 V, T_J = 55 °C
On-State Drain Current^a
I_D(on)
V_DS ≥ 5 V, V_GS = 10 V
Drain-Source On-State Resistance^a
R_DS(on)
V_GS = 10 V, I_D = 5.7 A
V_GS = 4.5 V, I_D = 4.3 A
Forward Transconductance^a
g_fs
V_DS = 15 V, I_D = 5.7 A
Dynamic^b
Input Capacitance
C_iss
Output Capacitance
C_oss
V_DS = 20 V, V_GS = 0 V, f = 1 MHz
Reverse Transfer Capacitance
C_rss
Total Gate Charge
Q_g
V_DS = 20 V, V_GS = 10 V, I_D = 5.2 A
Gate-Source Charge
Gate-Drain Charge
Gate Resistance
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Q_gs
Q_gd
R_g
t_d(on)
t_r
t_d(off)
t_f
t_d(on)
t_r
t_d(off)
t_f
V_DS = 20 V, V_GS = 4.5 V, I_D = 5.2 A
f = 1 MHz
V_DD = 20 V, R_L = 4 Ω
I_D ≅ 5 A, V_GEN = 4.5 V, R_g = 1 Ω
V_DD = 20 V, R_L = 4 Ω
I_D ≅ 5 A, V_GEN = 10 V, R_g = 1 Ω
Min.
40
0.6
20
Typ.
40
- 3.8
0.035
0.039
18
Max.
Unit
1.6
± 100
1
10
0.042
0.047
V
mV/°C
V
nA
µA
A
Ω
S
700
76
pF
45
19
29
8
12
nC
1.5
2.4
1.9
Ω
9
15
50
80
20
30
7
12
ns
5
9
12
90
21
35
6
10
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Document Number: 73439
S-83052-Rev. B, 29-Dec-08