L Datasheet, PDF (2/5 Pages) Bi technologies – Resistor Networks

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DIMENSIONS in millimeters (inches)
A
L
Vishay Sfernice
CASE SIZE
0603
0805
1206
1505
2010
2512
C
E
A
± 0.152 (± 0.006)
1.52 (0.060)
1.91 (0.075)
3.06 (0.120)
3.81 (0.150)
5.08 (0.200)
6.30 (0.248)
B
D
B
± 0.127 (± 0.005)
0.85 (0.033)
1.27 (0.050)
1.60 (0.063)
1.32 (0.052)
2.54 (0.100)
3.30 (0.129)
C
± 0.127 (+ 0.005)
0.5 (0.020)
SUGGESTED LAND PATTERN in millimeters (inches) (to IPC-7351A)
G_min.
D/E
± 0.127 (± 0.005)
0.38 (0.015)
0.40 (0.016)
0.48 (0.019)
Z_max.
X_max.
CASE SIZE
0603
Z_max.
2.37 (0.093)
G_min.
0.35 (0.014)
X_max.
0.98 (0.039)
0805
2.76 (0.109)
0.74 (0.029)
1.40 (0.055)
1206
3.91 (0.154)
1.85 (0.073)
1.73 (0.068)
1505
4.66 (0.183)
2.44 (0.096)
1.45 (0.057)
2010
5.93 (0.233)
3.71 (0.146)
2.67 (0.105)
2512
7.15 (0.281)
4.93 (0.194)
3.43 (0.135)

Option: Enlarged Terminations: 0063
For stringent and special power dissipation requirements, the thermal resistance between the resistive layer and the solder joint
can be reduced using enlarged terminations chip resistors which are soldered on large and thick copper pads acting as heat
sinks (see application note: “Power Dissipation in High Precision Vishay Sfernice Chip Resistors and Arrays (P Thin Film, PRA
Arrays, CHP Thick Film)”: www.vishay.com/doc?53048).
For enlarged terminations: Please consult Vishay Sfernice.
Option: AEC-Q200 withstanding
Please order option 0058.
Revision: 04-Sep-14
2
Document Number: 53018
For technical questions, contact: [e-mail]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000