SI9138 Datasheet, PDF (14/14 Pages) Vishay Siliconix – Multi-Output, Individual On/Off Control Power-Supply Controller

Si9138
Vishay Siliconix
New Product
DESCRIPTION OF OPERATION (CONT’D)
Current Limit: Buck-Boost Converter
Similar to the buck converter; when the voltage across pin
CSP and pin CSN exceeds 410-mV typical, the two MOSFETs
will be turned off regardless of the input and output conditions.
Grounding:
There are two separate grounds on the Si9138, analog signal
ground (GND) and power ground (PGND). The purpose of two
separate grounds is to prevent the high currents on the power
devices (both external and internal) from interfering with the
analog signals. The internal components of Si9138 have their
grounds tied (internally) together. These two grounds are then
tied together (externally) at a single point, to ensure Si9138
noise immunity.
This separation of grounds should be maintained in the
external circuitry, with the power ground of all power devices
being returned directly to the input capacitors, and the small
signal ground being returned to the GND pin of Si9138.
RESET Handler
The power-good monitor generates a system RESET signal.
At first power-up (ON 3/5 going high), RESET is held low until
the 3.3-V and 5-V outputs are in regulation and beyond the
UVLO timer. At this point, an internal timer begins counting
oscillator pulses and RESET continues to be held low until
32,000 cycles have elapsed. After this timeout period, 107 ms
@ 300 kHz, RESET is actively pulled up to V_L, when the
recommended 20-kW resistor to V_L is on the RESET pin.
Output Overvoltage Protection
The 5-V and 3.3-V SMPS outputs are monitored for
overvoltage. If either output is typically more than 10% above
the nominal regulation point, all low-side gate drivers are
latched high until ON 3/5 is toggled. This action turns on the
synchronous rectifier MOSFETs with a 100% duty cycle, in
turn rapidly discharging the output capacitors and forcing all
SMPS outputs to ground.
Output Undervoltage Protection
In Si9138, each of the 5-V and 3.3-V SMPS outputs has an
undervoltage protection circuit that is activated 6,144 clock
cycles (20.48 ms) after the SMPS is enabled. If either SMPS
output is typically under 70% of the nominal value, all SMPSs
are latched off and their outputs are clamped to ground by the
synchronous rectifier MOSFETs. The SMPS will not restart
until both ON3/5 is toggled.
Stability:
Buck Converters:
In order to simplify designs, the 5-V and 3.3-V supplies do not
require external frequency compensation. Meanwhile, it
achieves excellent regulation and efficiency. The converters
are current mode control, with a bandwidth substantially
higher than the LC tank dominant pole frequency of the output
filter. To ensure stability, the minimum capacitance and
maximum ESR values are:
V_REF
C_LOAD w _{2p xĂVOUT x RCS x BW}
V_OUT x Rcs
ESR v _VREF
where V_REF = 3.3 V, V_OUT is the output voltage (5 V or 3.3 V),
Rcs is the current sensing resistor in ohms and BW = 50 khz.
With the components specified in the application circuit
(L = 10 mH, R_CS = 0.02 W, C_OUT = 330 mF, ESR
approximately 0.1 W), the converter should have a bandwidth
of approximately 50 kHz, with minimum phase margin of 65_,
and dc gain above 50 dB.
Other Outputs
The Si9138 also provides a 3.3-V reference which can be
externally loaded up to 1 mA, as well as, a 5-V LDO output
which can be loaded up to 30 mA, or even more depending on
the system application. When the 5-V buck converter is turned
on, the 5-V LDO output is shorted with the 5-V buck converter
output, so its loading capability is substantially increased. For
stability, the 3.3-V reference output requires a 1-mF capacitor,
and the 5-V LDO output requires a 4.7-mF capacitor.
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Document Number: 71446
S-20642—Rev. B, 13-May-02