SI786 Datasheet, PDF (13/14 Pages) Vishay Siliconix – Dual-Output Power-Supply Controller

Si786
Vishay Siliconix
Oscillator and SYNC
There are two ways to set the Si786 oscillator frequency: by
using an external SYNC signal, or using the internal oscillator.
The SYNC pin can be driven with an external CMOS level
signal with frequency from 240 kHz and 350 kHz to
synchronize to the internal oscillator. Tying SYNC to either V_L
or GND sets the frequency to 200 kHz and to REF sets the
frequency to 300 kHz.
Operation at 300 kHz is typically used to minimize output
passive component sizes. Slower switching speeds of
200 kHz may be needed for lower input voltages.
Internal V_L and REF
A 5-V linear regulator supplies power to the internal logic
circuitry. The regulator is available for external use from pin V_L ,
able to source 5 mA. A 10-mF capacitor should be connected
between V_L and GND. To increase efficiency, when the 5 V
switching supply has voltage greater than 4.5 V, V_L is internally
switched over to the output of the 5-V switching supply and the
linear regulator is turned off.
The 5-V linear regulator provides power to the internal 3.3-V
bandgap reference (REF). The 3.3-V reference can supply 5
mA to an external load, connected to pin REF. Between REF
and GND connect a capacitor, 0.22 mF plus 1 mF per mA of load
current. The switching outputs will vary with the reference;
therefore, placing a load on the REF pin will cause the main
outputs to decrease slightly, within the specified regulation
tolerance.
V_L and REF supplies stay on as long as V+ is greater than 4.5
V, even if the switching supplies are not enabled. This feature
is necessary when using the micropower regulators to keep
memory alive during shutdown.
Both linear regulators can be connected to their respective
switching supply outputs. For example, REF would be tied to
the output of the 3.3 V and V_L to 5 V. This will keep the main
supplies up in standby mode, provided that each load current
in shutdown is not larger than 5 mA.
Fault Protection
The 3.3 V and 5 V switching controllers as well as the
comparators are shut down when one of the linear
regulators drops below 85% of its nominal value; that is, shut
down will occur when V_L < 4.0 V or REF < 2.8 V.
Document Number: 70189
S-40807—Rev. J, 26-Apr-04
DESIGN CONSIDERATIONS
Inductor Design
Three specifications are required for inductor design:
inductance (L), peak inductor current (I_LPEAK), and coil
resistance (R_L). The equation for computing inductance is:
ǒ Ǔ ǒ Ǔ _{L +} V_OUT V_IN(MAX)–V_OUT
ǒ Ǔ ǒ Ǔ _VIN(MAX) (f) _IOUT (LIR)
Where:
V_OUT = Output voltage (3.3 V or 5 V);
V_IN(MAX) = Maximum input voltage (V);
f = Switching frequency, normally
300 kHz;
I_OUT = Maximum dc load current (A);
LIR = Ratio of inductor peak-to-peak ac current to
average dc load current, typically 0.3.
When LIR is higher, smaller inductance values are acceptable,
at the expense of increased ripple and higher losses.
The peak inductor current (I_LPEAK) is equal to the steady-state
load current (I_OUT) plus one half of the peak-to-peak ac current
(I_LPP). Typically, a designer will select the ac inductor current
to be 30% of the steady-state current, which gives I_LPEAK equal
to 1.15 times I_OUT .
The equation for computing peak inductor current is:
ǒ _{ǒ Ǔ} Ǔ ǒ Ǔ _{ILPEAK + IOUT )}
V_OUT V_IN(MAX)–V_OUT
(2)(f)(L) V_IN(MAX)
Output Capacitors
The output capacitors determine loop stability and ripple
voltage at the output. In order to maintain stability, minimum
capacitance and maximum ESR requirements must be met
according to the following equations:
C_F
u
V_REF
ǒ_VOUTǓǒ_RCSǓ_(2)(p)(GBWP)
and,
ESR_CF
t
ǒ_VOUTǓǒ_RCSǓ
V_REF
Where:
C_F = Output filter capacitance (F)
V_REF = Reference voltage, 3.3 V;
V_OUT = Output voltage, 3.3 V or 5 V;
R_CS = Sense resistor (W);
GBWP = Gain-bandwidth product, 60 kHz;
ESR_CF = Output filter capacitor ESR (W).
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