DG4051E Datasheet, PDF (11/20 Pages) Vishay Siliconix – Low Capacitance, Low Charge Injection, 4- / 8-Channel, Triple SPDT, Analog Multiplexers

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SCHEMATIC DIAGRAM (Typical Channel)
V+
DG4051E, DG4052E, DG4053E
Vishay Siliconix
A, B
V-
GND
C
V-
EN
V-
V-
Level
shift
Decode/
drive
Body
snatcher
X, Y, Z
V+
V-
X0, Y0, Z0
Xn, Yn, Zn
TEST CIRCUITS
V+
50 Ω
A
X0
V_X0
B
C
X1 - X6
DG4051E
X7
V_X7
ENABLE
X
GND
300 Ω
V-
V+
V_O
35 pF
50 Ω
A
X0 or Y0
V_X0 or V_Y0
B
X1 - X2 or
Y1 - Y2
DG4052E
X3 or Y3
V_X3 or V_Y3
ENABLE
X or Y
V_O
GND
300 Ω
35 pF
V-
V+
V+
V_A,B,C
0V
50 %
V_X0 or V_Y0 or V_Z0
V_O
V_X7
V_X3 or V_Y3
V_X1 or V_Y1 or V_Z1
90 %
tTRANS
X0 or Y0 or Z0 ON
X7 ON (DG4051E)
or
X3 or Y3 ON (DG4052E)
or
X1 or Y1 or Z1 ON
(DG4053E)
90 %
tTRANS
50 Ω
A or B
or C
X0 or Y0
or Z0
V_X0 or V_Y0 or V_Z0
DG4053E
X1 or Y1 or Z1
ENABLE X or Y or Z
V_X1 or V_Y1 or V_Z1
V_O
GND
300 Ω
35 pF
V-
Fig. 1 - Transition Time
S16-0623-Rev. A, 11-Apr-16
11
Document Number: 69685
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