SI9142 Datasheet, PDF (10/11 Pages) Vishay Siliconix – Synchronous Buck Controller for High Performance Processors

Si9142
Vishay Siliconix
capacitance, and should not be used for any other external
loads. V_L(in) drives the internal circuitry. It should be
connected through an RC filter to V_L(out).
exceeds 1.5 V, the gate drive pulses begin, with the duty cycle
of the high-side MOSFET beginning at 0% and gradually
increasing until the output voltage is in regulation.
Pin 17. LX - Inductor Node
The LX node is used internally to float the high-side n-channel
MOSFET gate drive. During the on-time of this MOSFET, the
gate to source voltage will be (V_L(out) - V_DIODE). The LX node
is also used internally as the negative sense voltage for over-
current protection.
Pin 19. BST - Bootstrap Voltage
The external high-side n-channel MOSFET gate drive voltage
is derived by bootstrapping the V_L(out) voltage on top of the
input supply voltage. The external 100-nF capacitor
connected across the BST and LX pins is charged to (V_L(out) -
V_DIODE) when the external low-side MOSFETs are on. Then,
when the low-side MOSFETs are turned off, BST is internally
connected to D_H in order to turn on the high-side MOSFET. D_L
is turned on at startup to ensure initial charging of the BST
capacitor.
Pin 20. ICS - Programmable Over-Current Protection
The over-current protection circuit senses the voltage across
the external high-side n-channel MOSFET to determine the
presence of an over-current condition. Current sensing occurs
only during the on-time of this MOSFET. The trigger level of
the over-current circuit is programmable by selecting the
external resistor value connected from V_CC to I_CS. Once the
over-current circuit has been triggered, it disables both output
gate drives within 250 nsec. The circuit also discharges the
soft-start capacitor as shown in the timing diagram in
Figure 3.
Under Voltage Lock-Out (UVLO)
The internal UVLO circuit is designed to prevent a converter
from starting when insufficient input voltage is present. UVLO
disables the oscillator, soft-start and output drives of the
Si9142 until V_L(out) reaches 3.8 V; see Figure 1. The UVLO
circuit has 200-mV hysteresis to prevent turn-on and -off
oscillations. When the oscillator is disabled, the Si9142 is in
stand-by mode, and consumes only 150 µA of supply current.
Start-up Timing Sequence
Please refer to Figure 1 for this description. When V_CC
reaches 4 V, V_L(out) produces at least 3.8 V, and V_REF has
stabilized and is regulating. The UVLO circuit enables the
oscillator and the soft-start circuits. Once the soft-start voltage
APPLICATIONS
Setting the Current Limit
The current limit is set by comparing the voltage drop across
the external high-side n-channel MOSFET with the voltage
dropped across a sense resistor connected between V_CC and
I_CS. The I_CS pin draws a constant current, and thus the
equation governing the overcurrent threshold is:
170 µA * R = I_Limit * R_MOSFET
Once the on-state resistance of the MOSFET is known, R can
be selected to set the desired current limit. One caution is in
order: since the MOSFET will normally be quite warm, the
resistance used in the equation should be the maximum
resistance at elevated temperatures, not typical resistance at
25°C. The designer should also leave adequate margin above
the normal output current, both to account for tolerances and
noise in the IC, as well as to permit any initial high currents
while charging output capacitors.
The Boost Diode
The application circuit shows the use of a 1N4148 diode for
the boost circuit. This provides a low-cost component for this
application. However, it may be advantageous in some circuits
to use a Schottky diode instead. The difference is that the
Schottky has less forward drop than the regular rectifier, and
this in turn means a somewhat greater gate drive voltage for
the external high-side MOSFET. For MOSFETs with high gate
threshold and/or low transconductance, the additional gate
drive may prove very beneficial in terms of the heating of the
MOSFET, and in turn the efficiency of the converter. A ½-A,
30-V Schottky works well in this application.
Grounding
The Si9142 is provided with both analog and power ground
pins (AGND and PGND, respectively). Because of the high
gate drive currents the Si9142 can source, it is essential that
these two grounds be separated. PGND should be attached
to the source of the external low-side MOSFET; AGND should
be attached to the small-signal components of the circuit,
such as the timing resistor and the feedback resistor. Each of
these grounds should be run back independently to the input
line capacitors, to avoid ground loops.
S-60752—Rev. C, 05-Apr-99
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