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SI9130 Datasheet, PDF (10/13 Pages) Vishay Siliconix – Pin-Programmable Dual Controller-Portable PCs
Si9130
Vishay Siliconix
REF,
3.3 V
(or Internal
5-V Reference)
1X
60 kHz
LPF
Summing
Comparator
Slope
Comp
CS_
FB_
R
Q
S
OSC
Level
Shift
BST_
DH_
LX_
25 mV
Minimum Current
(Pulse-Skipping Mode)
SS_
ON_
4 mA
VL
Current
Limit
0 mV to
100 mV
30R
3.3 V
1R
Synchronous
Rectifier Control
R
Q
S
FIGURE 3. Si9130 Controller Block Diagram
Shoot-
Through
Control
Level
Shift
VL
DL_
PGND
3.3-V and 5-V Switching Controllers
Each PWM controller on the Si9130 is identical with the exception
of the preset output voltages. The controllers only share three
functional blocks (see Figure 3): the oscillator, the voltage
reference (REF) and the 5-V logic supply (VL). The 3.3-V and 5-V
controllers are independently enabled with pins ON3 and ON5,
respectively. The PWMs are a direct-summing type, without the
typical integrating error amplifier along with the phase shift which
is a side effect of this type of topology. Feedback compensation
is not needed, as long as the output capacitance and its ESR
requirements are met, according to the Design Considerations
section of this data sheet.
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10
The main PWM comparator is an open loop device which is
comprised of three comparators summing four signals: the
feedback voltage error signal, current sense signal,
slope-compensation ramp and voltage reference as shown in
Figure 3. This method of control comes closer to the ideal of
maintaining the output voltage on a cycle-by-cycle basis.
When the load demands high current levels, the controller is in
full PWM mode. Every cycle from the oscillator asserts the
output latch and drives the gate of the high-side MOSFET for
a period determined by the duty cycle (approximately
VOUT/VIN 100%) and the frequency.
Document Number: 70190
S-40805—Rev. F, 26-Apr-04