DG441LE Datasheet, PDF (10/18 Pages) Vishay Siliconix – Low Charge Injection and Leakage, Quad SPST Switches

www.vishay.com
SCHEMATIC DIAGRAM (typical channel)
V+
DG441LE, DG442LE
Vishay Siliconix
S
Level
V_IN
Shift/
Drive
D
GND
V-
TEST CIRCUITS
Fig. 1
V+
V+
V_S
S
D
IN
R_L
3V
1 kΩ
GND
V-
V_O
C_L
35 pF
V-
C_L (includes fixture and stray capacitance)
Logic
3V
Input
0V
Switch _VS
Input
50 % 50 %
t_r < 20 ns
t_f < 20 ns
t_OFF
V_O
80 %
80 %
Switch 0 V
Output
t_ON
Note:
Logic input waveform is inverted for DG442.
Fig. 2 - Switching Time
V+
V+
R_g
S
D
IN
3V
GND
V-
V_O
C_L
1 nF
V-
Fig. 3 - Charge Injection
V_O
IN_{X OFF}
(DG441)
OFF
IN_X
(DG442)
ΔV
O
ON
OFF
ON
Q = ΔV_O x C_L
OFF
S16-0392-Rev. A, 07-Mar-16
10
Document Number: 76754
For technical questions, contact: [e-mail]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000