SIE802DF Datasheet, PDF (1/10 Pages) Vishay Siliconix – N-Channel 30-V (D-S) MOSFET

N-Channel 30-V (D-S) MOSFET
SiE802DF
Vishay Siliconix
PRODUCT SUMMARY
I_D (A)^a
V_DS (V)
R_DS(on) (Ω)^e
Silicon Package
Limit
Limit ^Qg ^(Typ.)
0.0019 at V_GS = 10 V 202
30
0.0026 at V_GS = 4.5 V 173
60
50 nC
60
Package Drawing
www.vishay.com/doc?72945
10 9 8
7
D GS
S
PolarPAK
6
D
6
7
8 9 10
D
D
S
GD
FEATURES
• Halogen-free According to IEC 61249-2-21
Definition
• TrenchFET^® Gen II Power MOSFET
• Ultra Low Thermal Resistance Using Top-
Exposed PolarPAK^® Package for Double-Sided
Cooling
• Leadframe-Based New Encapsulated Package
- Die Not Exposed
- Same Layout Regardless of Die Size
• Low Q_gd/Q_gs Ratio Helps Prevent Shoot-Through
• 100 % R_g and UIS Tested
• Compliant to RoHS directive 2002/95/EC
APPLICATIONS
• VRM
• DC/DC Conversion: Low-Side
• Synchronous Rectification
D
D GS
S
D
1 23
4
5
Top View
5
4
32 1
Bottom View
Top surface is connected to pins 1, 5, 6, and 10
Ordering Information: SiE802DF-T1-E3 (Lead (Pb)-free)
SiE802DF-T1-GE3 (Lead (Pb)-free and Halogen-free)
G
S
N-Channel MOSFET
For Related Documents
www.vishay.com/ppg?72985
ABSOLUTE MAXIMUM RATINGS T_A = 25 °C, unless otherwise noted
Parameter
Symbol
Limit
Unit
Drain-Source Voltage
Gate-Source Voltage
V_DS
30
V_GS
± 20
V
T_C = 25 °C
202 (Silicon Limit)
60^a (Package Limit)
Continuous Drain Current (T_J = 150 °C)
T_C = 70 °C
I_D
60^a
T_A = 25 °C
42.7^{b, c}
T_A = 70 °C
34.2^{b, c}
A
Pulsed Drain Current
I_DM
100
Continuous Source-Drain Diode Current
T_C = 25 °C
T_A = 25 °C
I_S
60^a
4.3^{b, c}
Single Pulse Avalanche Current
Avalanche Energy
L = 0.1 mH
I_AS
E_AS
50
125
mJ
T_C = 25 °C
125
Maximum Power Dissipation
T_C = 70 °C
T_A = 25 °C
P_D
80
5.2^{b, c}
W
T_A = 70 °C
3.3^{b, c}
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature)^{d, e}
T_J, T_stg
- 55 to 150
260
°C
Notes:
a. Package limited is 60 A.
b. Surface Mounted on 1" x 1" FR4 board.
c. t = 10 s.
d. See Solder Profile (www.vishay.com/doc?73257). The PolarPAK is a leadless package. The end of the lead terminal is exposed copper (not
plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not
required to ensure adequate bottom side solder interconnection.
e. Rework Conditions: manual soldering with a soldering iron is not recommended for leadless components.
Document Number: 72985
S09-1337-Rev. E, 13-Jul-09
www.vishay.com
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