DG2788A Datasheet, PDF (1/10 Pages) Vishay Siliconix – Low Capacitance, Dual DPDT / Quad SPDT Analog Switch

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DG2788A
Vishay Siliconix
0.37 , Low Capacitance, Dual DPDT / Quad SPDT Analog Switch
DESCRIPTION
The DG2788A, is a four-channel single-pole double-throw
(SPDT) analog switch with two control inputs. It is also
known as a two-channel double-pole double-throw (DPDT)
configuration. The part is designed to operate from 1.8 V to
5.5 V single power rail. All switches conduct equally well in
both directions, offering rail to rail signal witching and can be
used both as multiplexers as well as de-multiplexers.
The DG2788A offers low parasitic capacitance and highly
matched low and flat switch resistance over the full signal
range. It features break-before-make switching and low
control logic threshold. The part supports rail to rail fast
edge pulsing signals and have 0.1 ns/typ. propagation
delay. It is ideal for both analog and digital signal switching
in space constrain applications requiring high performance
and efficient use of board space.
The DG2788A comes in a small miniQFN-16 lead package
of 2.6 mm x 1.8 mm x 0.55 mm.
FEATURES
• 1.8 V to 5.5 V single supply operation
• Low resistance: 0.37 /typ. at 2.7 V
• Highly flat and matched R_ON
• Low parasitic capacitance,
C_ON = 26 pF, C_OFF = 14.5 pF
• High bandwidth: 338 MHz
• 0.1 ns/typ. propagation delay for rail to rail fast edge
pulsing signal
• Guaranteed logic high 1.2 V, logic low 0.3 V
• Break before make switching
• Signal swing over V+ capable
• Power down protection
• Latch up current: 300 mA (JESD78)
• ESD / HBM: > 2 kV
• Material categorization: for definitions of compliance
please see www.vishay.com/doc?99912
BENEFITS
• Low and flat resistance
• Excellent total harmonic distortion
• Low parasitic capacitance
• Low voltage control interface
APPLICATIONS
• Analog and digital signal switching
• SMA optical image stabilization
• Relay replacement
• Portable instrumentation
• Smart phones and tablets
• Modems and peripherals
• Data storage
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
NC2 ₁
GND ₂
NO3 3
COM3 4
12 ^COM1
2xx
11 ^NO1
Pin 1
10 V+
9 ^NC4
Device marking: 2xx
xx = date / lot traceability code
Note: pin 1 has long lead
TRUTH TABLE
LOGIC
0
1
NC1, 2, 3 and 4
On
Off
NO1, 2, 3 and 4
Off
On
S16-1836-Rev. B, 12-Sep-16
1
Document Number: 79391
For technical questions, contact: [e-mail]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000