2N5564 Datasheet, PDF (1/5 Pages) Vishay Siliconix – Matched N-Channel JFET Pairs

2N5564/5565/5566
Vishay Siliconix
Matched N-Channel JFET Pairs
PRODUCT SUMMARY
Part Number
2N5564
2N5565
2N5566
V_GS(off) (V)
–0.5 to –3
–0.5 to –3
–0.5 to –3
V_(BR)GSS Min (V)
–40
–40
–40
g_fs Min (mS)
7.5
7.5
7.5
I_G Typ (pA)
–3
–3
–3
jV_GS1 – V_GS2j Max (mV)
5
10
20
FEATURES
D Two-Chip Design
D High Slew Rate
D Low Offset/Drift Voltage
D Low Gate Leakage: 3 pA
D Low Noise: 12 nV⁄√Hz @ 10 Hz
D Good CMRR: 76 dB
D Minimum Parasitics
BENEFITS
D Tight Differential Match vs. Current
D Improved Op Amp Speed, Settling Time
Accuracy
D Minimum Input Error/Trimming Requirement
D Insignificant Signal Loss/Error Voltage
D High System Sensitivity
D Minimum Error with Large Input Signals
D Maximum High Frequency Performance
APPLICATIONS
D Wideband Differential Amps
D High-Speed,
Temp-Compensated,
Single-Ended Input Amps
D High-Speed Comparators
D Impedance Converters
D Matched Switches
DESCRIPTION
The 2N5564/5565/5566 are matched pairs of JFETs mounted
in a TO-71 package. This two-chip design reduces parasitics
for good performance at high frequency while ensuring
extremely tight matching. This series features high
breakdown voltage (V_(BR)DSS typically > 55 V), high gain
(typically > 9 mS), and <5 mV offset between the two die.
The hermetically-sealed TO-71 package is available with full
military processing (see Military Information).
For similar products see the low-noise U/SST401 series, and
the low-leakage 2N5196/5197/5198/5199 data sheets.
TO-71
S₁
1
D₁
2
G₂
6
5
D₂
3
G₁
4
S₂
Top View
ABSOLUTE MAXIMUM RATINGS
Gate-Drain, Gate-Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40 V
Gate-Gate Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . "80 V
Gate Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
Lead Temperature (¹/₁₆” from case for 10 sec.) . . . . . . . . . . . . . . . . . . 300 _C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65 to 200_C
Document Number: 70254
S-04031—Rev. D, 04-Jun-01
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . –55 to 150_C
Power Dissipation :
Per Side^a . . . . . . . . . . . . . . . . . . . . . . . . 325 mW
Total^b . . . . . . . . . . . . . . . . . . . . . . . . . . . 650 mW
Notes
a. Derate 2.6 mW/_C above 25_C
b. Derate 5.2 mW/_C above 25_C
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