PI2061 Datasheet, PDF (9/16 Pages) Vicor Corporation – High Side High Voltage Load Disconnect Switch Controller IC

Not Recommended for New Designs
Application Information
The PI2061 Cool-Switch is a wide input voltage high side
load disconnect switch.
This section describes in detail the procedure to follow
when designing with the PI2061 load disconnect switch.
Biasing sequence Functionality
When Vin is applied and the load is at zero volts, the VC
capacitor will charge via current flowing through R_VC, D1,
load resistance and R_PG. If the load resistance is much
lower than R_PG, most of the charge and bias current flows
through the load.
As VC to SGND voltage rises above the Under-Voltage
Rising Threshold (V_VCUVR) while the EN pin is High, the
controller will charge the MOSFET gate and monitor the
voltage across the sense resistor (V_SP-SN). As the MOSFET
turns on, the load voltage (Vout) will rise until the MOSFET
is in R_DS(on) and Vload=Vin. If the voltage across the sense
resistor (
) is higher than the High Range Overcurrent
Threshold (V_OC-THH 166mV) while the load rises, the gate
will be discharged to PGND and latch off; otherwise Vout
will keep rising, D1 becomes reverse biased and the
controller bias current returns to ground through R_PG.
When Vout reaches the Over Current Range switch over
threshold, the over current threshold switches to the Low
Range Over Current threshold (V_OC-THL 70mV). VC will be
biased from Vout through the SN pin when Vout is a diode
drop (D_BST) above VC as the load reaches Vin.
Upper and lower bias resistors should be selected to keep
PI2061 bias voltage in regulation.
Upper Side Bias Resistor selection: R_VC
R_VC is placed between Vin and VC to limit the current into
the clamp under a shorted load condition. This will allow
VC to regulate with respect to SGND/PDND node when the
MOSFET is in off condition and SGND/PGND node is pulled
low via D1, Rs and low load resistance.
The R_VC resistor can be calculated using the following
expression:
And R_VC maximum power dissipation is:

Where:
:
Vin minimum voltage (Vin to Rtn)
: Vin maximum voltage (Vin to Rtn)
: VC maximum clamp voltage, 12.5V
: VC minimum clamp voltage, 11V
: VC maximum quiescent current at startup,
use 3.0mA
:
D1 voltage drop, use 0.3V
: 0.1mA is added for margin
Lower Side Bias Resistor selection: RPG
R_PG is placed between SGND/PGND and return to limit the
clamp current and allow VC regulation when the MOSFET
is in the on condition.
The R_PG resistor can be calculated using the following
expression:
And R_VC maximum power dissipation is:
Where:
:
:
:
Boot Strap diode minimum forward
voltage, use 0.8V
Boot Strap diode minimum forward
voltage, use 1.0V
VC maximum quiescent current, use
2.1mA
R_VC and R_PG calculation example
Vin (minimum) = 40V and Vin (maximum) = 50V
Note that in the case of a light load while the PI2061 is
disabled, a voltage will appear at Vout due to the
resistance between the VC pin and the SP and SN pins.
The approximate value will be:
Where:
: Output load resistance when the load is inactive
Picor Corporation • picorpower.com
PI2061
Rev 1.4
Page 9 of 16