PI2001 Datasheet, PDF (7/23 Pages) Vicor Corporation – Universal Active ORing Controller IC

Forward Voltage Comparator: FWD
The FWD comparator detects when a forward
current condition exists and SP is 6mV(typical)
positive with respect to SN. When SP-SN is less
than 6mV, the FWD comparator will assert the Fault
flag to report a fault condition indicative of a light
load or “load not present” condition or possible
shorted MOSFET.
Forward Over Current Comparator: FOC
The FOC comparator indicates an excessive forward
current condition when SP is 66mV(typical) higher
than SN. When the GATE output voltage is greater
than 77% of the regulated gate voltage and SP-SN
is higher than 66mV, the PI2001 will initiate a fault
condition via the FT pin.
Slave:
In high current applications multiple parallel
MOSFETs may be needed for a single ORing
function. Driving multiple MOSFETs with one
controller will increase the loading on the GATE pin
and the gate connection parasitic thereby impacting
the reverse turn-off response.
The Slave function synchronizes multiple controllers
so that one, or more, of the paralleled MOSFETs will
have its own local driving source.
In this configuration, one controller will be
designated as the master and it will control the
response of the slaved controllers.
When the controller is configured in “Master Mode”,
by connecting the BK to ground, the SL will be an
output having the same signal characteristics as the
GATE signal. In this configuration, the SL output is
capable of driving up to ten controllers, configured in
“Slave Mode”, through their corresponding SL pins.
Logic high for the SL pin is limited to 5.5V (max).
When the BK pin is tied to VC, the controller is
configured in “Slave Mode” and the SL pin becomes
an input. The Gate driver section and reverse
current section are the only active circuits in the
slave controller while the master performs the
diagnostics and gate drive control.
VC and Internal Voltage Regulator:
The PI2001 has a separate input (VC) that provides
power to the control circuitry and the gate driver. An
internal regulator clamps the VC voltage to 15.5V.
For high side applications, the VC input should be
high enough above the bus voltage to properly
enhance the external N-channel MOSFET. In a low
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side drive application VC may be tied to the bus
voltage through a resistor.
The internal regulator circuit has a comparator to
monitor VC voltage and initiates a FAULT condition
when VC is lower than the VC Under-Voltage
Threshold.
UV:
The Under-Voltage (UV) input trip point can be
programmed through an external resistor divider to
monitor the input voltage. The UV comparator
initiates a fault condition and pulls the FT pin low
when UV falls below the Under-Voltage Falling
Threshold. The GATE pin does not respond to a UV
fault. If the PI2001 is configured in a floating
application, where the GND pin is connected to the
input voltage, the UV pin cannot detect the input
voltage. In this case, the UV pin should be disabled
by connecting it to the VC pin.
OV:
The Over Voltage (OV) input trip point can be
programmed through an external resistor divider to
monitor the input voltage. The OV comparator
initiates a fault condition and pulls the FT pin low
when OV rises above the Over-Voltage Rising
Threshold. The GATE pin does not respond to an
OV fault. If the PI2001 is configured in a floating
application, where the GND pin is connected to the
input voltage, the OV pin cannot detect the input
voltage. In this case, the OV pin should be disabled
by connecting it to the GND pin.
Over-Temperature Detection:
The internal Over-Temperature block monitors the
junction temperature of the controller. The Over-
Temperature threshold is set to 160°C with -10°C of
hysteresis. When the controller temperature
exceeds this threshold, the Over-Temperature circuit
initiates a fault condition and pulls the FT pin low.
By maintaining proper thermal matching between
the controller and the power MOSFET, this function
can be used to protect the ORing device from
thermal runaway conditions. The GATE pin does not
respond to an Over-Temperature fault.
Gate Driver:
The gate driver (GATE) output is configured to drive
an external N-channel MOSFET. In the high state,
the gate driver applies a 1mA current source to the
MOSFET gate and regulates the voltage to 9.5V
typical (V_G-CLMP) above the SP pin voltage (V_SP)
when the VC input voltage is higher than V_SP plus
V_G-CLMP. Otherwise the gate voltage (V_G) to V_SP will
PI2001
Rev 1.0 Page 7 of 23