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PI2001 Datasheet, PDF (19/23 Pages) Vicor Corporation – Universal Active ORing Controller IC
Vaux: Connect each controller to the return path with
a separate bias resistor, Rbias.
To reduce Rbias power dissipation, VCclamp is
selected at 13V which is less than the actual PI2001
clamp voltage (15V typical). 13V is higher than PI2001
maximum gate clamp voltage (10.5V).
Rbias = Vauxmin − VCclamp = 36V −13V = 5.48KΩ
ICmax
4.2mA
or 5.49KΩ
Rbias maximum power dissipation is at maximum
input voltage and minimum clamp voltage
Pd Rbias
=
(Vauxmax −VCclampMIN ) 2
Rbias
= (60V −15V ) 2
5.49KΩ
= 369mW
Rb =
Ra⎜⎜⎝⎛
V
V
(OV
(UV
)
)
− 1⎟⎟⎠⎞
=
4.99kΩ⎜⎛ 65V
⎝ 34V
− 1⎟⎞ =
⎠
4.55KΩ
Or Rb=4.53KΩ
Rc
=
(Ra
+
Rb
)⎜⎜⎝⎛
V (UV )
V (UVTH
)
− 1⎟⎟⎠⎞
Rc = (4.99kΩ + 4.53KΩ)⎜⎛ 34V − 1⎟⎞ = 638kΩ
⎝ 500mV ⎠
or 634kΩ 1%
3. SP and SN pins: Connect the SP pin to the
MOSFET source and controller GND pin, and
connect the SN pin to Vin- and the drain of the
MOSFET.
4. BK pin: Connect the BK pin to the GND pin to
achieve the minimum reverse current response
time.
5. SL pin: Not required, so leave floating.
6. FT pin: Connect the FT pin to logic input and
to the logic power supply or to the VC pin via a
resistor.
7. UV and OV inputs: sensing input voltages Vin1-
and Vin2- separately in this application the
resistor divider has to be connected between
Vin1-/Vin2- and return. The PI2001 controller
GND pins are referenced to the load side, if the
resistor dividers are connected between Return
and Vin1-/Vin2- it will produce an error due the
voltage drop across the MOSFET and will expose
the OV and UV controller inputs to a high current
in case of an input short circuit and will damage
the controller.
The voltage across the load can be monitored by
one controller or both. The following shows the
resistor voltage divider configuration using the
three-resistor divider configuration:
Set IRa =100μA
Ra = V (UVTH ) = 500mV = 5kΩ or 4.99kΩ 1%
I Ra
100μA
Figure 17: PI2001 in low side -48V application
Picor Corporation • picorpower.com
PI2001
Rev 1.0 Page 19 of 23