PI3749-00-EVAL1 Datasheet, PDF (4/26 Pages) Vicor Corporation – Cool-Power® ZVS Switching Regulators

Pin Description
Pin Number
1-2,G-K
4-5,G-K
10-11,G-K
13-14,G-K
1E
1D
1C
1B
1A
2A
3A
4A
5A
6A
7A
8A
9A
10A
11A
12A
13A
14A
14D
14E
10-14,B + 10-12,C-E
2-9,B-E + 7-8,F-K
PI3749-x0
Pin Name
VIN
VS1
VS2
VOUT
VDR
PGD
SYNCO
SYNCI
ADR1
ADR0
SCL
SDA
EN
TRK
LGH
COMP
VSN
VSP
VDIFF
EAIN
EAO
IMON
ISN
ISP
SGND
PGND
Description
Input voltage and sense node for UVLO, OVLO and feed forward compensation.
Input side switching node and ZVS sense node for power switches.
Output side switching node and ZVS sense node for power switches.
Output voltage and sense node for power switches, V_OUT feed forward compensation, V_{OUT_OV}
and internal signals.
Internal 5.1V supply for gate drivers and internal logic; not for external use.
Fault & Power Good indicator. PGD pulls low when the regulator is not operating or if EAIN is less
than 1.4V.
Synchronization output. Outputs a high signal for ½ of the programmed switching period at the beginning
of each switching cycle, for synchronization of other regulators.
Synchronization input. When a falling edge synchronization pulse is detected, the PI3749-x0 will delay
the start of the next switching cycle until the next falling edge sync pulse arrives, up to a maximum delay
of two times the programmed switching period. If the next pulse does not arrive within two times the
programmed switching period, the controller will leave sync mode and start a switching cycle automatically.
Connect to SGND when not in use.
I²C™ Addressing Pin, for use with PI3749-20 only. No connect for the PI3749-00.
I²C Addressing Pin, for use with PI3749-20 only. No connect for the PI3749-00.
I²C Clock, for use with the PI3749-20 only. Connect to SGND for PI3749-00.
I²C Clock, for use with the PI3749-20 only. Connect to SGND for PI3749-00.
Regulator Enable control. Asserted high or left floating = regulator enabled;
asserted low, regulator output disabled.
Soft-start and track input. An external capacitor may be connected between TRK pin and SGND to decrease
the rate of output rise during soft-start.
For factory use only. Connect to SGND in application.
Error amp compensation dominant pole. Connect a capacitor between COMP and SGND to set the control
loop dominant pole.
General purpose amplifier inverting input
General purpose amplifier non-inverting input
General Purpose amplifier output. When unused connect VDIFF to VSN and VSP to SGND.
Error amplifier inverting input and sense for PGD. Connect by resistive divider to the output.
Transconductance error amplifier output, PWM input and external connection for load sharing.
Connect a capacitor between EAO and SGND to set the control loop high frequency pole.
High side current sense amplifier output
High side current sense amplifier negative input
High side current sense amplifier positive input
Signal ground. Internal logic and analog ground for the regulator. SGND and PGND are star connected
within the regulator package.
Power ground. V_IN, V_OUT, VS1 and VS2 power returns. SGND and PGND are star connected within the
regulator package.
Cool-Power^® ZVS Switching Regulators
Page 4 of 26
Rev 1.8
03/2017
vicorpower.com
800 927.9474