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PI3749-00-EVAL1 Datasheet, PDF (20/26 Pages) Vicor Corporation – Cool-Power® ZVS Switching Regulators | |||
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PI3749-x0
I2C Addressing
The PI3749-20 is hardware compatible with the NXP I2C⢠Bus Specification Version 2.1, January 2000, in Standard Mode (100kHz) for all
bus timing and voltage levels up to 5.5V. It operates as a slave on the I2C bus.
The PI3749-20 I2C interface responds to the address programmed by the two I2C Address pins, ADR1 and ADR0. The address pins are
three level inputs, providing nine possible combination pairs, although only eight of these combinations are unique, as shown in table 3.
Considering only the 7 bit address sub-field, the high-order address bits <6> through <4> are hardcoded to 4âb1001, while the lower order
address bits <3> through <0> are modified by the ADRx pins.
ADDRx state
ADR1 ADR0
Resultant I2C address sub-field
Sub-field bit positions <7.1>
Hexadecimal Decimal
Binary
Fully formed address write word
(including lsb of the transfer set for a write)
Binary
L
L
7âh48
72
7âb100_1000 8âb1001_0001
L
M
7âh49
73
7âb100_1001 8âb1001_0011
L
H
7âh4A
74
7âb100_1010 8âb1001_0101
M
L
7âh4B
75
7âb100_1011 8âb1001_0111
M
M
7âh4C
76
7âb100_1100 8âb1001_1001
M
H
7âh4D
77
7âb100_1101 8âb1001_1011
H
L
7âh4E
78
7âb100_1110 8âb1001_1101
H
M
7âh4F
79
7âb100_1111 8âb1001_1111
H
H
7âh4F
79
7âb100_1111 8âb1001_1111
Table 3 â I2C Address selection
Note that the state of the ADRx pins is resolved on each I2C address transfer. Therefore the PI3749-20 address can be changed while the
regulator is powered up and in operation.
I2C Command Structure
Depending on the state of the read/write bit, two types of transfers are possible:
a. Write: Data transferred from the I2C master to the PI3749-20 slave
The first byte is transmitted by the master and includes the slave address and the R/W bit set to write (as shown in the last column of
Table 3.) The second byte is also transmitted by the master and is the write data. The slave responds between each byte with an
acknowledge bit.
b. Read: Data returned from the PI3749-20 slave to the master
The first byte is transmitted by the master and includes the slave address but the R/W bit is set to read. The slave responds to the
first byte (the address transmitted by the master) with an acknowledge bit. The second byte is transmitted by the slave back to the
master and is the read data. The master responds after the read data byte with a not-acknowledge bit (since the PI3749-20 read
data are all single byte registers).
Figure 28 â Data transfer on the I2C bus
Per the I2C standard, the master generates all serial clock pulses, and all data is transferred MSB first.
Cool-Power® ZVS Switching Regulators
Page 20 of 26
Rev 1.8
03/2017
vicorpower.com
800 927.9474
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