PI3302-00-LGIZ Datasheet, PDF (37/42 Pages) Vicor Corporation – 8 V to 36 Vin Cool-Power ZVS Buck Regulator Family

Murata Part Number
Description
GRM188R71C105KA12D
1µF 16 V 0603 X7R
GRM319R71H104KA01D
0.1µF 50 V 1206 X7R
GRM31CR60J107ME39L
100 µF 6.3 V 1206 X5R
GRM31CR71H475KA12K
4.7 µF 50 V 1206 X7R
GRM31CR61A476ME15L
47 µF 10 V 1206 X5R
GRM31CR61E226KE15L
22 µF 25 V 1206 X5R
Table 6 — Capacitor manufacturer part numbers
Layout Guidelines
To optimize maximum efficiency and low noise performance from
a PI33xx-x0 design, layout considerations are necessary. Reducing
trace resistance and minimizing high current loop returns along
with proper component placement will contribute to optimized
performance.
A typical buck converter circuit is shown in Figure 63. The
potential areas of high parasitic inductance and resistance are the
circuit return paths, shown as LR below.
V
IN
C_IN
C_OUT
PI33xx-x0
When Q1 is on and Q2 is off, the majority of C_IN’s current is used
to satisfy the output load and to recharge the C_OUT capacitors.
When Q1 is off and Q2 is on, the load current is supplied by the
inductor and the C_OUT capacitor as shown in Figure 65. During
this period C_IN is also being recharged by the V_IN. Minimizing C_IN
loop inductance is important to reduce peak voltage excursions
when Q1 turns off. Also, the difference in area between the C_IN
loop and C_OUT loop is vital to minimize switching and GND noise.
V_IN
C_IN
C_OUT
Figure 65 — Current flow: Q2 closed
The recommended component placement, shown in Figure 66,
illustrates the tight path between C_IN and C_OUT (and V_IN and V_OUT)
for the high AC return current. This optimized layout is used on
the PI33xx-x0 evaluation board.
Figure 63 — Typical Buck Converter
The path between the C_OUT and C_IN capacitors is of particular
importance since the AC currents are flowing through both of
them when Q1 is turned on.
Figure 64, schematically, shows the reduced trace length between
input and output capacitors. The shorter path lessens the effects
that copper trace parasitics can have on the
PI33xx-x0 performance.
C_OUT
C_IN
V_OUT
GND
V_IN
GND
VSW
V_IN
C_IN
C_OUT
Figure 64 — Current flow: Q1 closed
Cool-Power®
Page 37 of 42
Rev 2.0
02/2016
Figure 66 — Recommended component placement and
metal routing
Figure 67 details the recommended receiving footprint for
PI33xx-x0 10 mm x 14 mm package. All pads should have a final
copper size of 0.55 mm x 0.55 mm, whether they are solder-mask
defined or copper defined, on a 1 mm x 1 mm grid. All stencil
openings are 0.45mm when using either a 5 mil or 6 mil stencil.
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