PRM48BY480X500A00 Datasheet, PDF (34/44 Pages) Vicor Corporation – High Efficiency Converter

Arrays (Adaptive Loop Operation)
In Adaptive Loop operation a master-slave configuration is used for
arrays. Up to 5 PRMs of the same type may be placed in parallel to
expand the power capacity of the system.
One PRM is designated as the master and contains the active control
loop which considers control pin inputs and drives SHARE. The other
PRMs listen to SHARE and act as slave powertrains only. The
following high-level guidelines must be followed in order for the
resultant system to start up and operate properly, and to avoid
overstress or exceeding any absolute maximum ratings.
n One PRM must be designated as a master through configuring the
TRIM pin voltage within the recommended range.
n All other PRMs must be designated as slave PRMs by tying TRIM
pins to SGND. It is recommended to make this connection
through a 0 Ω jumper for troubleshooting purposes.
n All PRMs in the array must be powered from a common power
source so that the input voltage to each PRM is the same. The IN
pins of all PRMs must be connected together.
n An independent fuse for each PRM +IN connection is required to
maintain safety certifications (see Fusing section).
n An independent inductor for each PRM +IN connection is
recommended when used in an array, to control circulating
currents among the PRM inputs and reduce the impact of
beat frequencies.
n Mismatches in both inductance, and resistance from the common
power source to each PRM should be minimized.
n ENABLE pins must be connected together for start up
synchronization and proper fault response of the array.
PRM48By480x500A00
n SHARE pins must be connected together to enable sharing. The
bandwidth requirements of SHARE are low enough that the bus
can be considered a lumped element, rather than a transmission
line, and so star connections to the master PRM with stubs, as well
as daisy chain connections are permitted.
n The resistances between slave unit SHARE pins and the master’s
should be well matched, to avoid introducing additional sharing
mismatches. The SHARE bus should not be routed under any
PRM. SHARE bus parasitic capacitance to +IN or +OUT
should be minimized.
n SGND of the master PRM is the reference for all control loop
functions. The SGND pins of each slave PRMs should be
connected to the SGND reference node on the board through
a 1 Ω resistor.
n When operating within an array, the master PRM is rated for full
power while the slave PRMs are de-rated to the array rated power
and current values provided for Slave Operation
(P_{OUT_ARRAY},I_{OUT_ARRAY}). The number of PRMs required to
achieve a given array capacity must consider these de-ratings to
avoid overstressing any PRM in the array.
n Adaptive Loop design procedures above will hold for an array, in
general, although some parameters must be scaled against the
number of PRMs in the system.
Arrays of more than 5 PRMs may be possible through use of external
circuitry. Please contact Vicor Applications for assistance with array
sizing above 5 units.
V_IN
F₁
C_IN
R_TRIM
R_AL
SGND 1
L_{IN 1}
GND
GND
F₂
L_{IN 2}
GND
PRM 1 MASTER
ENABLE
TRIM
AL
SHARE/
CONTROL NODE
VAUX
REF/
REF_EN
VC
VT
IFB
VTM Start Up Pulse
Adaptive Loop Temperature Feedback
+IN
+OUT
L_{F 1}
VF: 20 V to 55 V
C_{F 1}
–IN
SGND
–OUT
SGND 2
SGND 1
PRM 2 SLAVE
ENABLE
TRIM
AL
SHARE/
CONTROL NODE
VAUX
REF/
REF_EN
VC
VT
IFB
VTM Start Up Pulse
+IN
–IN
SGND
1Ω
SGND 1
SGND 2
+OUT
–OUT
L_{F 2}
C_{F 2}
Figure 36 — Adaptive Loop Array Example
VTM 1
VC
+OUT
TM
PC
+IN
–IN
–OUT
PRIMARY
SECONDARY
ISOLATION BOUNDRY
VTM 2
VC
+OUT
TM
PC
+IN
–IN
–OUT
PRIMARY
SECONDARY
ISOLATION BOUNDRY
SEC_GND
PRM^TM Regulator
Page 34 of 44
Rev 1.4
11/2015
vicorpower.com
800 927.9474
V_OUT
C_OUT
SEC_GND