PI3318-01-LGIZ Datasheet, PDF (18/26 Pages) Vicor Corporation – 8V to 36Vin, 15A Cool-Power ZVS Buck Regulator

Functional Description
The PI33XX-X1 is a family of highly integrated ZVS-
Buck regulators. The PI33XX-X1 has a set output
voltage that is trimmable within a prescribed range
shown in Table 1. Performance and maximum
output current are characterized with a specific
external power inductor (see Table 5).
L1
Vin
Vin
VS1
Cin
PI33XX
PGND
Vout
REM
SYNCI
SYNCO
EN
TRK
ADJ
EAO
Vout
Cout
Figure 2 - ZVS-Buck with required components
For basic operation, Figure 2 shows the connections
and components required. No additional design or
settings are required.
ENABLE (EN)
EN is the enable pin of the converter. The EN Pin is
referenced to SGND and permits the user to turn the
converter on or off. The EN default polarity is a
positive logic assertion. If the EN pin is left floating
or asserted high, the converter output is enabled.
Pulling EN pin below 0.8 Vdc with respect to SGND
will disable the regulator output.
The EN input polarity can be programmed (PI33XX-
21 device versions only) via the I²C data bus. When
the EN pin polarity is programmed for negative logic
assertion; and if the EN pin is left floating, the
regulator output is enabled. Pulling the EN pin above
1.0 Vdc with respect to SGND, will disable the
regulator output.
Remote Sensing
An internal 100Ω resistor is connected between REM
pin and VOUT pin to provide regulation when the
REM connection is broken. Referring to Figure 2, it is
important to note that L1 and Cout are the output
filter and the local sense point for the power supply
output. As such, the REM pin should be connected
at Cout as the default local sense connection unless
PI33XX-X1
remote sensing to compensate additional
distribution losses in the system. The REM pin
should not be left floating.
Switching Frequency Synchronization
The SYNCI input allows the user to synchronize the
controller switching frequency by an external clock
referenced to SGND. The external clock can
synchronize the unit between 50% and 110% of the
preset switching frequency (f_S). For PI33XX-21 device
versions only, the phase delay can be programmed
via I²C bus with respect to the clock
applied at SYNCI pin. Phase delay allows PI33XX-X1
regulators to be paralleled and operate in an
interleaving mode.
The PI33XX-X1 default for SYNCI is to sync with
respect to the falling edge of the applied clock
providing 180° phase shift from SYNCO. This allows
for the paralleling of two PI33XX-X1 devices without
the need for further user programming or external
sync clock circuitry. The user can change the SYNCI
polarity to sync with the external clock rising edge
via the I²C data bus (PI33XX-21 device versions only).
When using the internal oscillator, the SYNCO pin
provides a 5V clock that can be used to sync other
regulators. Therefore, one PI33XX-X1 can act as the
lead regulator and have additional PI33XX-X1s
running in parallel and interleaved.
Soft-Start
The PI33XX-X1 includes an internal soft-start
capacitor to ramp the output voltage in 2ms from 0V
to full output voltage. Connecting an external
capacitor from the TRK pin to SGND will increase the
start-up ramp period. See, “Soft Start Adjustment
and Track,” in the Applications Description section
for more details.
Output Voltage Trim
The PI33XX-X1 output voltage can be trimmed up
from the preset output by connecting a resistor from
ADJ pin to SGND and can be trimmed down by
connecting a resistor from ADJ pin to VOUT. The
Table 2 defines the voltage ranges for the PI33XX-X1
family.
vicorpower.com
800 735.6200
Rev 1.3
09/2015
Cool-Power^®
Page 18 of 26