BCM384X480Y325BZZ Datasheet, PDF (15/22 Pages) Vicor Corporation – Isolated Fixed Ratio DC-DC Converter

BCM384x480y325Bzz
This is similar in form to Eq. (3), where R_OUT is used to represent
the characteristic impedance of the SAC™. However, in this case a
real R on the input side of the SAC is effectively scaled by K² with
respect to the output.
Assuming that R = 1Ω, the effective R as seen from the secondary
side is 15.6mΩ, with K = 1/8.
A similar exercise should be performed with the additon of a
capacitor or shunt impedance at the input to the SAC. A switch in
series with V_IN is added to the circuit. This is depicted in Figure 19.
S
V_Vinin
+
–
C
S_SA_AC_C™
K^K=⁼1/¹3^/82
VV_ouo_tut
Figure 19 — Sine Amplitude Converter™ with input capacitor
A change in V_IN with the switch closed would result in a change in
capacitor current according to the following equation:
^{IC (t) = C dVdtIN}
(7)
Assume that with the capacitor charged to V_IN, the switch is
opened and the capacitor is discharged through the idealized SAC.
In this case,
Low impedance is a key requirement for powering a high-
current, low-voltage load efficiently. A switching regulation stage
should have minimal impedance while simultaneously providing
appropriate filtering for any switched current. The use of a SAC
between the regulation stage and the point of load provides a
dual benefit of scaling down series impedance leading back to
the source and scaling up shunt capacitance or energy storage
as a function of its K factor squared. However, the benefits are
not useful if the series impedance of the SAC is too high. The
impedance of the SAC must be low, i.e. well beyond the crossover
frequency of the system.
A solution for keeping the impedance of the SAC low involves
switching at a high frequency. This enables small magnetic
components because magnetizing currents remain low. Small
magnetics mean small path lengths for turns. Use of low loss core
material at high frequencies also reduces core losses.
The two main terms of power loss in the BCM module are:
n No load power dissipation (P_NL): defined as the power
used to power up the module with an enabled powertrain
at no load.
n
Resistive
the BCM
lmososd(Pu_RleOUmT)o: _dreefleerds
to
as
the power loss across
pure resistive impedance.
P_DISSIPATED = P_NL + P_ROUT
(10)
Therefore,
P_OUT = P_IN – P_DISSIPATED = P_IN – P_NL – P_ROUT
(11)
The above relations can be combined to calculate the overall
module efficiency:
I_C = I_OUT • K
(8)
^h = P^O_P^UINT _{= P}^IN
–
P_NL –
P_IN
P_ROUT
(12)
substituting Eq. (1) and (8) into Eq. (7) reveals:
I ^{OU T = KC2} •
dV_OUT
dt
(9)
The equation in terms of the output has yielded a K² scaling
factor for C, specified in the denominator of the equation.
A K factor less than unity results in an effectively larger
capacitance on the output when expressed in terms of the
input. With a K = 1/8 as shown in Figure 19, C = 1µF would appear
as C = 64µF when viewed from the output.
=
V_IN
•
I_IN
–
P_NL –
V_IN •
(I_OUT)²
I_IN
•
R_{OUT
= 1 –}
(P_NL + (I_OUT)² • R_OUT)
V_IN • I_IN
BCM^® Bus Converter
Page 15 of 22
Rev 1.1
10/2016
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