B048X240Y30A Datasheet, PDF (11/18 Pages) Vicor Corporation – Unregulated DC-DC Converter

Not Recommended for New Designs
B048x240y30A
9.0 SINE AMPLITUDE CONVERTER™ POINT OF LOAD CONVERSION
L_IN = 0.6 nH
+
V^VIN_IN
C^C_ININ
R2_{RC.C2ININmΩ}
2 µF
I^I_Q^Q
123 mA
–
1/2 • I_OUT
I_O^IO_UU_TT
2000 pH
V•I
++
0.006 Ω
1/2 • V_IN
––
K
R^R_OOU_UT_T
L_OUT = 600 pH
43.4 mΩ
+
R^R4C_1CO_7OU_µT_UΩT
C_O^C_UO_TUT
12 µF
V^V_OO_UU_TT
–
Figure 13 — VI Chip^® module AC model
The Sine Amplitude Converter (SAC™) uses a high frequency
resonant tank to move energy from input to output. (The
resonant tank is formed by Cr and leakage inductance Lr in the
power transformer windings as shown in the BCM module
Block Diagram. See Section 8). The resonant LC tank, operated
at high frequency, is amplitude modulated as a function of
input voltage and output current. A small amount of
capacitance embedded in the input and output stages of the
module is sufficient for full functionality and is key to achieving
power density.
The B048x240y30A SAC can be simplified into the preceeding
model.
R_OUT represents the impedance of the SAC, and is a function of
the R_DSON of the input and output MOSFETs and the winding
resistance of the power transformer. I_Q represents the
quiescent current of the SAC control, gate drive circuitry, and
core losses.
The use of DC voltage transformation provides additional
interesting attributes. Assuming that R_OUT = 0 Ω and I_Q = 0 A,
Eq. (3) now becomes Eq. (1) and is essentially load
independent, resistor R is now placed in series with V_IN.
At no load:
V_OUT = V_IN ^• K
K represents the “turns ratio” of the SAC.
Rearranging Eq (1):
K = ^VOUT
V_IN
In the presence of load, V_OUT is represented by:
V_OUT = V_IN • K – I_OUT • R_OUT
and I_OUT is represented by:
I_OUT
=
I_IN
–
K
I_Q
RR
(1)
V_VINin
+
–
S^SA^AC^C™
K^K=⁼1¹/3^/22
VV_Oo_Uu_Tt
Figure 14 — K = 1/2 Sine Amplitude Converter™
(2)
with series input resistor
The relationship between V_IN and V_OUT becomes:
V_OUT = (V_IN – I_IN • R) • K
(5)
(3)
Substituting the simplified version of Eq. (4)
(I_Q is assumed = 0 A) into Eq. (5) yields:
V_OUT = V_IN • K – I_OUT • R • K²
(6)
(4)
BCM^® Bus Converter
Page 11 of 18
Rev 1.1
11/2014
vicorpower.com
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