BCM3814X60E10A5YZZ Datasheet, PDF (10/39 Pages) Vicor Corporation – Isolated Fixed-Ratio DC-DC Converter

BCM3814x60E10A5yzz
Signal Characteristics
Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of -40°C ≤ T_CASE
≤100°C (T-Grade); all other specifications are at T_CASE = 25ºC unless otherwise noted. Please note: For chassis mount model, Vicor part number 42550 will be
needed for applications requiring the use of the signal pins. Signal cable 42550 is rated up to five insertions and extractions. To avoid unnecessary stress on the
connector, the cable should be tied to the chassis.
EXT. BIAS (VDDB) Pin
• 5V supply input, required to power the circuitry internal to the BCM in a VIA package for communication signals such as SCL, SDA, ADDR etc
• Voltage to EXT BIAS pin is needed for PMBus™ enable and disable control. It is not needed for PMBus monitoring voltage, current, power or temperature.
Lower voltage is better. It will help to lower the power dissapation in the internal regulator that is generating 3.3V voltage for communication circuits.
• Apply voltage to this pin between 4.5V and 9V. The nominal voltage is 5V.
SIGNAL TYPE
STATE
ATTRIBUTE
SYMBOL
CONDITIONS / NOTES
MIN TYP MAX UNIT
INPUT
Regular
Operation
Startup
VDDB Voltage
VDDB Current consumption
Inrush Current Peak
Turn on time
V_VDDB
I_VDDB
I_{VDDB_INR}
t_{VDDB_ON}
V_VDDB Slew Rate = 1V/µs
From V_{VDDB_MIN} to PMBus active
4.5
5
9
V
50 mA
3.5
A
1.5
ms
SGND Pin
• This pin is supply return pin for Ext. Bias (VDDB) pin.
• All input and output signals (SCL, SDA, ADDR) are referenced to SGND pin.
Note: Keep SGND Signal of the BCM in a VIA package separated from the low voltage side power return terminal (–LO) in electrical design.
Address (ADDR) Pin
• This pin programs only a Fixed and Persistent slave address for BCM in a VIA package.
• This pin programs the address using a resistor between ADDR pin and signal ground.
• The address is sampled during startup and is used until power is reset.
• This pin has 10kΩ pullup resistor internally between ADDR pin and internal VDD.
• 16 addresses are available. Relative to nominal value of internal VDD (V_{VDD_NOM} = 3.3V), a 206.25mV range per address.
SIGNAL TYPE
STATE
ATTRIBUTE
SYMBOL
CONDITIONS / NOTES
MIN
Regular
ADDR Input Voltage
V_SADDR See address section
0
MULTI‐LEVEL
INPUT
Operation _{ADDR leakage current}
I_SADDR Leakage current
Startup
ADDR registration time
t_SADDR
From V_{VDD_IN_MIN}
TYP MAX UNIT
3.3 V
1
µA
1
ms
BCM^® in a VIA Package
Page 10 of 39
Rev 1.4
09/2016
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